US7112495B2
Expired / Lapsed
US
⏱️ 0.0 years remaining
Structure and method of a strained channel transistor and a second semiconductor component in an integrated circuit
Assignee: Taiwan Semiconductor Manufacturing Co TSMC Ltd
•
Filing: 2003-12-05
•
Granted: 2006-09-26
•
Expires: 2023-12-05
Abstract
Abstract A semiconductor chip includes a semiconductor substrate 126 , in which first and second active regions are disposed. A resistor 124 is formed in the first active region and the resistor 124 includes a doped region 128 formed between two terminals 136 . A strained channel transistor 132 is formed in the second active region. The transistor includes a first and second stressor 141 , formed in the substrate oppositely adjacent a strained channel region 143.
Inventors
- 👤 Chih-Hsin Ko
- 👤 Wen-Chin Lee
- 👤 Yee-Chia Yeo
- 👤 Chun-Chieh Lin
- 👤 Chenming Hu
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 15:26
CPC Classifications
H; H10; H10P; H10P30/00; H10P30/20; H10P30/21; H10D; H10D30/00; H10D30/60; H10D30/601; H10D30/608; H10D30/791; H10D30/797; H10D62/00; H10D62/01; H10D62/021; H10D64/00; H10D64/01; H10D64/015; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/0167; H10D84/017; H10D84/02; H10D84/03; H10D84/038; H10P30/202; H10P30/204; H10P30/208; H10D30/01; H10D30/021; H10D30/0212; H10D30/0223; H10D30/0227; H10P95/00; H10P95/90
Claims Analysis
Total Claims: 74
Claim 1
Independent Claim
187 words
A method of forming a semiconductor chip, the method comprising: providing a semiconductor region comprising a first semiconductor material with a first natural lattice constant; forming first and second active regions in the semiconductor region; forming a first gate stack over the second active region; forming first spacers adjacent the first gate stack; forming a masking layer over the first active region; after forming the masking layer, forming at least one recess in a portion of the second active region not covered by the first gate stack; forming a second semiconductor material in the at least one recess to substantially fill the at least one recess, the second semiconductor material having a second natural lattice constant that is different than the first natural lattice constant; forming heavily-doped source and drain regions in the second active region on opposing sides of the first gate stack; removing the first spacers after the forming heavily-doped source and drain regions; forming lightly-doped drains after the removing the first spacers on opposing sides of the first gate stack; removing the masking layer; and forming a semiconductor component in the first active region.
Claim 2
Independent Claim
187 words
A method of forming a semiconductor chip, the method comprising: providing a semiconductor region comprising a first semiconductor material with a first natural lattice constant; forming first and second active regions in the semiconductor region; forming a first gate stack over the second active region; forming first spacers adjacent the first gate stack; forming a masking layer over the first active region; after forming the masking layer, forming at least one recess in a portion of the second active region not covered by the first gate stack; forming a second semiconductor material in the at least one recess to substantially fill the at least one recess, the second semiconductor material having a second natural lattice constant that is different than the first natural lattice constant; forming heavily-doped source and drain regions in the second active region on opposing sides of the first gate stack; removing the first spacers after the forming heavily-doped source and drain regions; forming lightly-doped drains after the removing the first spacers on opposing sides of the first gate stack; removing the masking layer; and forming a semiconductor component in the first active region.
Claim 3
Dependent Claim
39 words
The method of claim 1 wherein the step of forming first and second active regions comprises the steps of: forming trenches to define the active regions; filling the trenches with a trench filling material; and doping the active regions.
Claim 4
Dependent Claim
18 words
The method of claim 1 wherein forming the second semiconductor material comprises performing a chemical vapor deposition step.
Claim 5
Dependent Claim
17 words
The method of claim 1 wherein forming the second semiconductor material comprises performing a selective epitaxy step.
Claim 6
Dependent Claim
24 words
The method of claim 1 wherein forming a semiconductor component comprises forming a doped region in the first active region to form a resistor.
Claim 7
Dependent Claim
22 words
The method of claim 5 , further comprising forming at least two electrical contacts that are electrically coupled to the doped region.
Claim 8
Dependent Claim
16 words
The method of claim 5 wherein forming the doped region comprises performing an ion implantation step.
Claim 9
Dependent Claim
19 words
The method of claim 1 wherein forming the heavily-doped source and drain regions comprises performing an ion implantation step.
Claim 10
Dependent Claim
25 words
The method of claim 1 and further comprising forming a cap layer overlying the second semiconductor material, the cap layer comprising the first semiconductor material.
Claim 11
Dependent Claim
17 words
The method of claim 1 wherein the gate stack comprises a gate electrode overlying a gate dielectric.
Claim 12
Dependent Claim
18 words
The method of claim 10 wherein the gate stack further comprises a gate mask overlying the gate electrode.
Claim 13
Dependent Claim
19 words
The method of claim 1 wherein the second natural lattice constant is larger than the first natural lattice constant.
Claim 14
Dependent Claim
21 words
The method of claim 1 wherein the first semiconductor material comprises silicon and the second semiconductor material comprises silicon and germanium.
Claim 15
Dependent Claim
16 words
The method of claim 13 wherein forming heavily-doped source and drain regions comprises P-typed doped regions.
Claim 16
Dependent Claim
19 words
The method of claim 1 wherein the second natural lattice constant is smaller than the first natural lattice constant.
Claim 17
Dependent Claim
21 words
The method of claim 1 wherein the first semiconductor material is silicon and the second semiconductor material comprises silicon and carbon.
Claim 18
Dependent Claim
23 words
The method of claim 1 further comprising a step of forming silicide on the gate stack, the source region, and the drain region.
Claim 19
Dependent Claim
44 words
The method of claim 1 further comprising steps of: forming contact etch stop layer over the resistor and the semiconductor component; forming passivation layer over the contact etch stop layer; and forming contacts to the resistor and transistor through the contact etch stop layer.
Claim 20
Dependent Claim
12 words
The method of claim 1 wherein the semiconductor component comprises a transistor.
Claim 21
Dependent Claim
15 words
The method of claim 19 wherein the transistor comprises a strained channel field effect transistor.
Claim 22
Dependent Claim
30 words
The method of claim 19 wherein the strained channel transistor comprises a transistor of first doping type and wherein the semiconductor component comprises a transistor of a second doping type.
Claim 23
Dependent Claim
60 words
The method of claim 19 wherein the forming to first spacers comprises: forming a disposable film over the second active region, the disposable film overlying the gate stack; and processing the disposable film to form disposable spacers on sidewalls of the gate stack in the second active region; wherein the at least one recess is formed adjacent a disposable spacer.
Claim 24
Dependent Claim
36 words
The method of claim 19 and further comprising forming a second gate stack over the first active region, wherein the first gate stack and second gate stack each comprises a gate electrode overlying a gate dielectric.
Claim 25
Dependent Claim
18 words
The method of claim 1 and further comprising forming second spacers onto sidewalls of the first gate stack.
Claim 26
Dependent Claim
20 words
The method of claim 1 and further comprising forming a hard mask over the first gate stack and first spacers.
Claim 27
Dependent Claim
14 words
The method of claim 25 wherein the hard mask comprises multiple layers of material.
Claim 28
Dependent Claim
18 words
The method of claim 25 and further comprising, after growing to second semiconductor material, removing the hard mask.
Claim 29
Dependent Claim
17 words
The method of claim 1 wherein the second semiconductor material is in-situ doped with a p-type dopant.
Claim 30
Dependent Claim
27 words
The method of claim 28 wherein the second semiconductor material is in-situ doped with a dopant selected from the group consisting of boron, indium, and combinations thereof.
Claim 31
Dependent Claim
17 words
The method of claim 1 wherein the second semiconductor material is in-situ doped with an n-type dopant.
Claim 32
Dependent Claim
28 words
The method of claim 30 wherein the second semiconductor material is in-situ doped with a dopant selected from the group consisting of As, P, Sb, and combinations thereof.
Claim 33
Dependent Claim
28 words
The method of claim 1 and further comprising, after forming the heavily-doped source and drain regions, forming a first conductive material on the heavily-doped source and drain regions.
Claim 34
Dependent Claim
23 words
The method of claim 32 wherein the first conductive material comprises cobalt germanosilicide Co(SiGe), nickel germanosilicide Ni(SiGe), Co(SiC), or Ni(SiC), or combinations thereof.
Claim 35
Independent Claim
158 words
A method of forming a semiconductor device, the method comprising: providing a semiconductor substrate comprising a first semiconductor material, the substrate including a first active region and a second active region, the first active region having a first gate stack formed thereon and the second active region having a second gate stack farmed thereon; forming a film over first active region and second active region; forming spacers on sidewalls of the second gate stack in the second active region; etching a source recess and a drain recess on opposing sides of the second gate stack, the source recess and the drain recess spaced from a channel region by the spacers; growing a second semiconductor material in the source recess and the drain recess; forming heavily-doped regions on opposing sides of the second gate stack; removing the spacers after forming the heavily-doped regions; and forming lightly-doped regions on opposing sides of the second gate stack after removing the spacers.
Claim 36
Independent Claim
158 words
A method of forming a semiconductor device, the method comprising: providing a semiconductor substrate comprising a first semiconductor material, the substrate including a first active region and a second active region, the first active region having a first gate stack formed thereon and the second active region having a second gate stack farmed thereon; forming a film over first active region and second active region; forming spacers on sidewalls of the second gate stack in the second active region; etching a source recess and a drain recess on opposing sides of the second gate stack, the source recess and the drain recess spaced from a channel region by the spacers; growing a second semiconductor material in the source recess and the drain recess; forming heavily-doped regions on opposing sides of the second gate stack; removing the spacers after forming the heavily-doped regions; and forming lightly-doped regions on opposing sides of the second gate stack after removing the spacers.
Claim 37
Dependent Claim
23 words
The method of claim 34 wherein the first gate stack and second gate stack each comprise a gate electrode overlying a gate dielectric.
Claim 38
Dependent Claim
14 words
The method of claim 35 further comprising a hard mask overlying the gate electrode.
Claim 39
Dependent Claim
16 words
The method of claim 36 wherein the hard mask comprises multiple layers of hard mask material.
Claim 40
Dependent Claim
19 words
The method of claim 36 wherein the hard mask comprises silicon oxide, silicon oxynitride, silicon nitride, or combinations thereof.
Claim 41
Dependent Claim
18 words
The method of claim 36 and further comprising, after growing the second semiconductor material, removing the hard mask.
Claim 42
Dependent Claim
12 words
The method of claim 34 wherein the first semiconductor material comprises silicon.
Claim 43
Dependent Claim
14 words
The method of claim 40 wherein the second semiconductor material comprises silicon and germanium.
Claim 44
Dependent Claim
14 words
The method of claim 40 wherein the second semiconductor material comprises silicon and carbon.
Claim 45
Dependent Claim
18 words
The method of claim 34 wherein the semiconductor substrate comprises an insulator layer underlying the first semiconductor material.
Claim 46
Dependent Claim
19 words
The method of claim 34 wherein the semiconductor substrate comprises a relaxed SiGe layer underlying the first semiconductor material.
Claim 47
Dependent Claim
12 words
The method of claim 44 wherein the first semiconductor material comprises silicon.
Claim 48
Dependent Claim
17 words
The method of claim 34 wherein the second semiconductor material is in-situ doped with a p-type dopant.
Claim 49
Dependent Claim
21 words
The method of claim 46 wherein the p-type dopant is selected from the group consisting of boron, indium, and combinations thereof.
Claim 50
Dependent Claim
17 words
The method of claim 34 wherein the second semiconductor material is in-situ doped with an n-type dopant.
Claim 51
Dependent Claim
22 words
The method of claim 48 wherein the n-type dopant is selected from the group consisting of As, P, Sb, and combinations thereof.
Claim 52
Dependent Claim
30 words
The method of claim 34 and further comprising: forming a first source region and a first drain region in the first active region oppositely adjacent to the first gate stack.
Claim 53
Dependent Claim
34 words
The method of claim 50 and further comprising, after forming the first source region and the first drain region, forming a first conductive material on the first source region and the first drain region.
Claim 54
Dependent Claim
28 words
The method of claim 51 wherein the first conductive material comprises cobalt silicide CoSi, nickel silicide NiSi, cobalt germanosilicide Co(SiGe), nickel germanosilicide Ni(SiGe), Co(SiC), Ni(SiC) or combinations thereof.
Claim 55
Dependent Claim
22 words
The method of claim 50 and further comprising, after forming the lightly-doped regions, forming a second conductive material on the lightly-doped regions.
Claim 56
Dependent Claim
26 words
The method of claim 53 wherein the second conductive material comprises cobalt suicide CoSi, nickel suicide NiSi, cobaltgermanosilicide Co(SiGe), nickelgermauosilicide Ni(SiGe), Co(SiC), Ni(SiC) or combinations thereof.
Claim 57
Dependent Claim
39 words
The method of claim 34 wherein forming spacers on sidewalls of the second gate stack comprises: forming a disposable film over the second active region including the second gate stack; and forming disposable spacers by etching the disposable film.
Claim 58
Dependent Claim
55 words
The method of claim 55 wherein the step of forming a film over the first active region and the second active region comprises the step of forming a disposable film, the method further comprising forming a masking layer over a portion of the disposable film overlying the first active region prior to forming disposable spacers.
Claim 59
Dependent Claim
20 words
The method of claim 55 wherein forming disposable spacers comprises performing a plasma etch process or a wet etch process.
Claim 60
Dependent Claim
21 words
The method of claim 55 and further comprising removing the disposable spacers after forming the source recess and the drain recess.
Claim 61
Dependent Claim
28 words
The method of claim 58 and further comprising, after growing the second semiconductor material, forming spacers on sidewalls of the first gate stack and the second gate stack.
Claim 62
Dependent Claim
20 words
The method of claim 59 wherein the spacers on the sides of first and second gate stacks are composite spacers.
Claim 63
Dependent Claim
17 words
The method of claim 34 wherein growing a second semiconductor material comprises a performing selective epitaxy process.
Claim 64
Dependent Claim
25 words
The method of claim 34 and further comprising, after growing a second semiconductor material, selectively growing a first semiconductor material overlying the second semiconductor material.
Claim 65
Dependent Claim
45 words
The method of claim 34 wherein the first gate stack and the second gate stack each include a gate electrode formed from a material selected from the group consisting of polycrystalline silicon, polycrystalline silicon-germanium, a metal, a metal suicide, a metal nitride, and combinations thereof.
Claim 66
Dependent Claim
45 words
The method of claim 34 wherein the first gate stack and the second gate stank each include a gate dielectric formed from a material selected from the group consisting of silicon oxide, silicon oxynitride, silicon nitride, hafnium oxide, aluminum oxide, zirconium oxide, or combinations thereof.
Claim 67
Independent Claim
153 words
A method of forming a semiconductor device, the method comprising; providing a semiconductor layer that includes a first active region and a second active region; forming a first gate stack over the first active region and a second gate stack over the second active region; forming a dielectric film over the first active region and the second active region; forming a masking layer over a portion of the dielectric film overlying the second active region; forming disposable spacers on sidewalls of the first gate stack by anisotropically etching the dielectric film; forming first and second recesses in the first active region substantially aligned with the disposable spacer; filling the first and second recesses with a semiconductor material; implanting source and drain regions in the second active region adjacent the second gate stack; removing the disposable spacers; and forming lightly-doped drains on opposing sides of the first gate stack after removing the disposable spacers.
Claim 68
Independent Claim
153 words
A method of forming a semiconductor device, the method comprising; providing a semiconductor layer that includes a first active region and a second active region; forming a first gate stack over the first active region and a second gate stack over the second active region; forming a dielectric film over the first active region and the second active region; forming a masking layer over a portion of the dielectric film overlying the second active region; forming disposable spacers on sidewalls of the first gate stack by anisotropically etching the dielectric film; forming first and second recesses in the first active region substantially aligned with the disposable spacer; filling the first and second recesses with a semiconductor material; implanting source and drain regions in the second active region adjacent the second gate stack; removing the disposable spacers; and forming lightly-doped drains on opposing sides of the first gate stack after removing the disposable spacers.
Claim 69
Dependent Claim
24 words
The method of claim 65 and further comprising, after filling the first and second recesses, removing the dielectric film over the first active region.
Claim 70
Dependent Claim
108 words
The method of claim 66 and, after removing the disposable spacers and the dielectric film, further comprising: forming lightly doped regions of a first conductivity type in the first active region adjacent the first gate stack; forming lightly doped regions of a second conductivity type in the second active region adjacent the second gate stack; forming first spacers adjacent the first gate stack and second spacers adjacent the second stack; forming heavily doped regions of the first conductivity type in the first active region adjacent the first spacers; and forming heavily doped regions of the second conductivity type in the first active region adjacent the first gate stack.
Claim 71
Dependent Claim
55 words
The method of claim 65 and, after filling the first and second recesses, further comprising: removing the masking layer from over the second active region; forming a second masking layer over the first active region; and etching the second masking layer over the second active region to form second spacers adjacent the second gate stack.
Claim 72
Dependent Claim
33 words
The method of claim 68 wherein implanting a source region and a drain region comprises implanting a source region and a drain region in the second active region aligned with the second spacers.
Claim 73
Dependent Claim
25 words
The method of claim 69 and further comprising, after implanting the source region and the drain region, removing the disposable spacers and the second spacers.
Claim 74
Dependent Claim
50 words
The method of claim 70 and further comprising, after removing the disposable spacers and the second spacers, forming a first lightly doped region in the first active region adjacent the first gate stack and forming a second lightly doped region in the second active region adjacent the second gate stack.
References Cited (Backward Citations)
US4069094A
Cited
US4314269A
Cited
US4497683A
Cited
US4631803A
Cited
US4892614A
Cited
US4952993A
Cited
US4946799A
Cited
US5130773A
Cited
US5155571A
Cited
US5378919A
Cited
US5338960A
Cited
US5461250A
Cited
US5273915A
Cited
US5596529A
Cited
US5656524A
Cited
EP0683522A2
Cited
US5534713A
Cited
US5479033A
Cited
US5447884A
Cited
US6433382B1
Cited
US5629544A
Cited
US5955766A
Cited
US5708288A
Cited
EP0828296A2
Cited
US5789807A
Cited
US5811857A
Cited
US5763315A
Cited
US6046487A
Cited
US5714777A
Cited
US6015990A
Cited
US6059895A
Cited
US6111267A
Cited
US6291321B1
Cited
US6759717B2
Cited
US6489664B2
Cited
US6100153A
Cited
US6222234B1
Cited
US6558998B2
Cited
US6407406B1
Cited
US6008095A
Cited
US6387739B1
Cited
US6015993A
Cited
US6232163B1
Cited
US6256239B1
Cited
US6258664B1
Cited
US6358791B1
Cited
US20020074598A1
Cited
US6872810B1
Cited
US6339232B1
Cited
US20020190284A1
Cited
US6797556B2
Cited
US6448613B1
Cited
US6294834B1
Cited
US6475838B1
Cited
US6281059B1
Cited
US6498359B2
Cited
US6724019B2
Cited
US6555839B2
Cited
US6524905B2
Cited
US6429061B1
Cited
US20020076899A1
Cited
US20020031890A1
Cited
US6525403B2
Cited
US6413802B1
Cited
US20020125471A1
Cited
US6448114B1
Cited
US6414355B1
Cited
US20030080386A1
Cited
US6518610B2
Cited
US6475869B1
Cited
US20020153549A1
Cited
US6586311B2
Cited
US6633070B2
Cited
US6653700B2
Cited
US20030001219A1
Cited
US6576526B2
Cited
WO2003017336A2
Cited
US20030030091A1
Cited
US6521952B1
Cited
US6621131B2
Cited
US6885084B2
Cited
US6657276B1
Cited
US6600170B1
Cited
US6784101B1
Cited
US20040026765A1
Cited
US6812103B2
Cited
US6617643B1
Cited
US6686247B1
Cited
US20040217448A1
Cited
US6573172B1
Cited
US6720619B1
Cited
US6803641B2
Cited
US20040173815A1
Cited
US6794764B1
Cited
US6762448B1
Cited
US20050029601A1
Cited
US6891192B2
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2009-09-25 | 2010-03-27 | 2010-09-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2013-09-25 | 2014-03-27 | 2014-09-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2017-09-25 | 2018-03-27 | 2018-09-26 | $7700.00 | Window Closed / Lapsed |