Semiconductor device having MIS field effect transistors or three-dimensional structure

Claim 2

A semiconductor device comprising: a semiconductor substrate of a first conductivity type; an insulating film including a first portion and a second portion formed on the semiconductor substrate; a semiconductor projection of the first conductivity type comprising a first side surface and a second side surface formed between the first portion and the second portion of the insulating film, the semiconductor projection being projected from a surface of the insulating film, a bottom of the semiconductor projection being connected to the semiconductor substrate; a gate electrode formed on the first side surface of the semiconductor projection with a gate insulating film interposed therebetween; a source region and a drain region of a second conductivity type formed in the first side surface of the semiconductor projection, the source region and the drain region being located on both sides of the gate electrode; a first impurity region of the first conductivity type formed in a portion of the semiconductor substrate below the first portion of the insulating film; and a second impurity region of the first conductivity type formed in a portion of the semiconductor substrate below the second portion of the insulating film, the second impurity region being in contact with the first impurity region in a portion of the semiconductor substrate below the semiconductor projection.

Claim 3

The semiconductor device according to claim 1 , further comprising a third impurity region of the first conductivity type formed in the top surface of the semiconductor projection, the third impurity region being higher in doping level than the semiconductor layer of the semiconductor projection.

Claim 4

The semiconductor device according to claim 1 , wherein the length in the direction parallel to the surface of the semiconductor substrate and perpendicular to the direction from the source region to the drain region of the portion of the semiconductor projection on which the gate electrode is located is shorter than the length in the corresponding direction of the portions of the semiconductor projection where the source and drain regions are formed.

Claim 5

A semiconductor device comprising: a semiconductor substrate of a first conductivity type; an insulating film including a first portion and a second portion formed on the semiconductor substrate; a semiconductor projection of the first conductivity type comprising a first side surface and a second side surface formed between the first portion and the second portion of the insulating film, the semiconductor projection being projected from a surface of the insulating film, a bottom of the semiconductor projection being connected to the semiconductor substrate; a gate electrode formed on the first side surface of the semiconductor projection with a gate insulating film interposed therebetween; a source region and a drain region of a second conductivity type formed in the first side surface of the semiconductor projection, the source region and the drain region being located on both sides of the gate electrode; a first impurity region of the first conductivity type formed in a portion of the semiconductor substrate below the first portion of the insulating film; a second impurity region of the first conductivity type formed in a portion of the semiconductor substrate below the second portion of the insulating film; and a contact plug buried in a hole formed in at least one of the first portion and the second portion of the insulating film, the contact plug being connected with a corresponding one of the first and second impurity regions.

Claim 6

A semiconductor device comprising: a semiconductor substrate of a first conductivity type; an insulating film including a first portion and a second portion formed on the semiconductor substrate; a semiconductor projection of the first conductivity type comprising a first side surface and a second side surface formed between the first portion and the second portion of the insulating film, the semiconductor projection being projected from a surface of the insulating film, a bottom of the semiconductor projection being connected to the semiconductor substrate; a gate electrode formed on the first side surface of the semiconductor projection with a gate insulating film interposed therebetween; a source region and a drain region of a second conductivity type formed in the first side surface of the semiconductor projection, the source region and the drain region being located on both sides of the gate electrode; a first impurity region of the first conductivity type formed in a portion of the semiconductor substrate below the first portion of the insulating film; a second impurity region of the first conductivity type formed in a portion of the semiconductor substrate below the second portion of the insulating film; and a contact plug buried in a hole formed in at least one of the first portion and the second portion of the insulating film, the contact plug being connected with a corresponding one of the first and second impurity regions.

Claim 7

The semiconductor device according to claim 4 , further comprising a third impurity region of the first conductivity type formed in the top surface of the semiconductor projection, the third impurity region being higher in doping level than the semiconductor layer of the semiconductor projection.

Claim 8

The semiconductor device according to claim 4 , wherein the length in the direction parallel to the surface of the semiconductor substrate and perpendicular to the direction from the source region to the drain region of the portion of the semiconductor projection on which the gate electrode is located is shorter than the length in the corresponding direction of the portions of the semiconductor projection where the source and drain regions are formed.

Claim 9

A semiconductor device comprising: a semiconductor substrate of a first conductivity type; an insulating film including a first portion and a second portion formed on the semiconductor substrate; a semiconductor projection of the first conductivity type comprising a first side surface and a second side surface and a top surface formed between the first portion and the second portion of the insulating film, the semiconductor projection being projected from a surface of the insulating film, a bottom of the semiconductor projection being connected to the semiconductor substrate; a gate insulating film formed on the first side surface of the semiconductor projection; a gate electrode formed on the gate insulating film on the first side surface of the semiconductor projection and above the top surface of the semiconductor projection; an insulating layer formed between the top surface of the semiconductor projection and the gate electrode, the insulating layer being larger in thickness than the gate insulating film; a source region and a drain region of a second conductivity type formed in the first side surface of the semiconductor projection, the source region and the drain region being located on both sides of the gate electrode; a first impurity region of the first conductivity type formed in a portion of the semiconductor substrate below the first portion of the insulating film; and a second impurity region of the first conductivity type formed in a portion of the semiconductor substrate below the second portion of the insulating film.

Claim 10

A semiconductor device comprising: a semiconductor substrate of a first conductivity type; an insulating film including a first portion and a second portion formed on the semiconductor substrate; a semiconductor projection of the first conductivity type comprising a first side surface and a second side surface and a top surface formed between the first portion and the second portion of the insulating film, the semiconductor projection being projected from a surface of the insulating film, a bottom of the semiconductor projection being connected to the semiconductor substrate; a gate insulating film formed on the first side surface of the semiconductor projection; a gate electrode formed on the gate insulating film on the first side surface of the semiconductor projection and above the top surface of the semiconductor projection; an insulating layer formed between the top surface of the semiconductor projection and the gate electrode, the insulating layer being larger in thickness than the gate insulating film; a source region and a drain region of a second conductivity type formed in the first side surface of the semiconductor projection, the source region and the drain region being located on both sides of the gate electrode; a first impurity region of the first conductivity type formed in a portion of the semiconductor substrate below the first portion of the insulating film; and a second impurity region of the first conductivity type formed in a portion of the semiconductor substrate below the second portion of the insulating film.

Claim 11

The semiconductor device according to claim 7 , wherein the first and second impurity regions are in contact with each other in a portion of the semiconductor substrate below the semiconductor projection.

Claim 12

The semiconductor device according to claim 7 , further comprising a contact plug buried in a hole formed in at least one of the first and second device isolation insulating films, the contact plug being connected with a corresponding one of the first and second impurity regions.

Claim 13

A semiconductor device comprising: a semiconductor substrate of a first conductivity type; an insulating film including a first portion and a second portion formed on the semiconductor substrate; a semiconductor projection of the first conductivity type comprising a first side surface and a second side surface formed between the first portion and the second portion of the insulating film, the semiconductor projection being projected from a surface of the insulating film, a bottom of the semiconductor projection being connected to the semiconductor substrate; a first gate electrode formed on the first side surface of the semiconductor projection with a gate insulating film interposed therebetween; a second gate electrode formed on the second side surface of the semiconductor projection with a gate insulating film interposed therebetween, the second gate electrode being separated from and opposed to the first gate electrode with the semiconductor projection interposed therebetween; source regions and drain regions of a second conductivity type formed in the first side surface and the second side surface of the semiconductor projection, the source regions and the drain regions being located on both sides of the first gate electrode and the second gate electrode; a first impurity region of the first conductivity type formed in a portion of the semiconductor substrate below the first portion of the insulating film; and a second impurity region of the first conductivity type formed in a portion of the semiconductor substrate below the second portion of the insulating film.

Claim 14

A semiconductor device comprising: a semiconductor substrate of a first conductivity type; an insulating film including a first portion and a second portion formed on the semiconductor substrate; a semiconductor projection of the first conductivity type comprising a first side surface and a second side surface formed between the first portion and the second portion of the insulating film, the semiconductor projection being projected from a surface of the insulating film, a bottom of the semiconductor projection being connected to the semiconductor substrate; a first gate electrode formed on the first side surface of the semiconductor projection with a gate insulating film interposed therebetween; a second gate electrode formed on the second side surface of the semiconductor projection with a gate insulating film interposed therebetween, the second gate electrode being separated from and opposed to the first gate electrode with the semiconductor projection interposed therebetween; source regions and drain regions of a second conductivity type formed in the first side surface and the second side surface of the semiconductor projection, the source regions and the drain regions being located on both sides of the first gate electrode and the second gate electrode; a first impurity region of the first conductivity type formed in a portion of the semiconductor substrate below the first portion of the insulating film; and a second impurity region of the first conductivity type formed in a portion of the semiconductor substrate below the second portion of the insulating film.

Claim 15

The semiconductor device according to claim 10 , wherein a different voltage is applied to each of the first and second gate electrodes for threshold voltage control.

Claim 16

The semiconductor device according to claim 11 , wherein the first and second impurity regions are in contact with each other in a portion of the semiconductor substrate below the semiconductor projection.

Claim 17

The semiconductor device according to claim 10 , further comprising a contact plug buried in a hole formed in at least one of the first and second device isolation insulating films, the contact plug being connected with a corresponding one of the first and second impurity regions.

Claim 18

A semiconductor device comprising: a semiconductor substrate of a first conductivity type; an insulating film including a first portion and a second portion formed on the semiconductor substrate; a semiconductor projection comprising a stack of a first impurity region of the first conductivity type, a second impurity region of a second conductivity type and a third impurity region of the first conductivity type, the first impurity region underlying the second impurity region, the second impurity region underlying the third impurity region, the semiconductor projection being formed between the first portion and the second portion of the insulating film, the semiconductor projection being projected from a surface of the insulating film, a bottom of the semiconductor projection being connected to the semiconductor substrate, the semiconductor projection comprising a first side surface and a second side surface of the third impurity region; a gate electrode formed on the first side surface of the third impurity region of the semiconductor projection with a gate insulating film interposed therebetween; a source region and a drain region of the second conductivity type formed in the first side surface of the third impurity region of the semiconductor projection, the source region and the drain region being located on both sides of the gate electrode; a fourth impurity region of the first conductivity type formed in a portion of the semiconductor substrate below the first portion of the insulating film; and a fifth impurity region of the first conductivity type formed in a portion of the semiconductor substrate below the second portion of the insulating film.

Claim 19

A semiconductor device comprising: a semiconductor substrate of a first conductivity type; an insulating film including a first portion and a second portion formed on the semiconductor substrate; a semiconductor projection comprising a stack of a first impurity region of the first conductivity type, a second impurity region of a second conductivity type and a third impurity region of the first conductivity type, the first impurity region underlying the second impurity region, the second impurity region underlying the third impurity region, the semiconductor projection being formed between the first portion and the second portion of the insulating film, the semiconductor projection being projected from a surface of the insulating film, a bottom of the semiconductor projection being connected to the semiconductor substrate, the semiconductor projection comprising a first side surface and a second side surface of the third impurity region; a gate electrode formed on the first side surface of the third impurity region of the semiconductor projection with a gate insulating film interposed therebetween; a source region and a drain region of the second conductivity type formed in the first side surface of the third impurity region of the semiconductor projection, the source region and the drain region being located on both sides of the gate electrode; a fourth impurity region of the first conductivity type formed in a portion of the semiconductor substrate below the first portion of the insulating film; and a fifth impurity region of the first conductivity type formed in a portion of the semiconductor substrate below the second portion of the insulating film.

Claim 20

The semiconductor device according to claim 14 , wherein the first, fourth and fifth impurity regions are in contact with one another in a portion of the semiconductor substrate below the semiconductor projection.

Claim 21

A semiconductor device comprising: a semiconductor substrate of a first conductivity type; an insulating film including a first portion and a second portion formed on the semiconductor substrate; a semiconductor projection of the first conductivity type comprising side surfaces and a top surface formed between the first portion and the second portion of the insulating film, the semiconductor projection being projected from a surface of the insulating film, a bottom of the semiconductor projection being connected to the semiconductor substrate; a gate electrode formed on the side surfaces and the top surface of the semiconductor projection with a gate insulating film interposed therebetween, the gate electrode comprising a top surface parallel to a surface of the semiconductor substrate; source regions and drain regions of a second conductivity type formed in the side surfaces of the semiconductor projection, the source regions and the drain regions being located on both sides of the gate electrode; a first impurity region of the first conductivity type formed in a portion of the semiconductor substrate below the first portion of the insulating film; and a second impurity region of the first conductivity type formed in a portion of the semiconductor substrate below the second portion of the insulating film, the top surface of the gate electrode being made flat over the top surface of the semiconductor projection and the first and second portions of the insulating film.

Claim 22

A semiconductor device comprising: a semiconductor substrate of a first conductivity type; an insulating film including a first portion and a second portion formed on the semiconductor substrate; a semiconductor projection of the first conductivity type comprising side surfaces and a top surface formed between the first portion and the second portion of the insulating film, the semiconductor projection being projected from a surface of the insulating film, a bottom of the semiconductor projection being connected to the semiconductor substrate; a gate electrode formed on the side surfaces and the top surface of the semiconductor projection with a gate insulating film interposed therebetween, the gate electrode comprising a top surface parallel to a surface of the semiconductor substrate; source regions and drain regions of a second conductivity type formed in the side surfaces of the semiconductor projection, the source regions and the drain regions being located on both sides of the gate electrode; a first impurity region of the first conductivity type formed in a portion of the semiconductor substrate below the first portion of the insulating film; and a second impurity region of the first conductivity type formed in a portion of the semiconductor substrate below the second portion of the insulating film, the top surface of the gate electrode being made flat over the top surface of the semiconductor projection and the first and second portions of the insulating film.

Claim 23

The semiconductor device according to claim 16 , wherein the first and second impurity regions are in contact with each other in a portion of the semiconductor substrate below the semiconductor projection.

Claim 24

The semiconductor device according to claim 16 , further comprising a contact plug buried in a hole formed in at least one of the first and second device isolation insulating films, the contact plug being connected with a corresponding one of the first and second impurity regions.

Claim 25

A semiconductor device comprising: an insulating film formed on a semiconductor substrate; a projecting semiconductor layer formed in a hole of the insulating film and extended on the insulating film, the projecting semiconductor layer being projected from a surface of the insulating film, the projecting semiconductor layer comprising end portions and a center portion including a first side surface and a second side surface, a length of the center portion of the projecting semiconductor layer in a width direction being shorter than that of the end portions of the projecting semiconductor layer in the width direction; a gate electrode formed on the first side surface of the center portion of the projecting semiconductor layer with a gate insulating film interposed therebetween; and a source region and a drain region formed in the end portions of the projecting semiconductor layer, the source region and the drain region being located on both sides of the gate electrode.

Claim 26

A semiconductor device comprising: an insulating film formed on a semiconductor substrate; a projecting semiconductor layer formed in a hole of the insulating film and extended on the insulating film, the projecting semiconductor layer being projected from a surface of the insulating film, the projecting semiconductor layer comprising end portions and a center portion including a first side surface and a second side surface, a length of the center portion of the projecting semiconductor layer in a width direction being shorter than that of the end portions of the projecting semiconductor layer in the width direction; a gate electrode formed on the first side surface of the center portion of the projecting semiconductor layer with a gate insulating film interposed therebetween; and a source region and a drain region formed in the end portions of the projecting semiconductor layer, the source region and the drain region being located on both sides of the gate electrode.

Claim 27

The semiconductor device according to claim 1 , wherein the gate electrode is also formed on the second side surface of the semiconductor projection.

Claim 28

The semiconductor device according to claim 4 , wherein the gate electrode is also formed on the second side surface of the semiconductor projection.

Claim 29

The semiconductor device according to claim 7 , wherein the gate electrode is also formed on the second side surface of the semiconductor projection.

Claim 30

The semiconductor device according to claim 14 , wherein the gate electrode is also formed on the second side surface of the third impurity region of the semiconductor projection.

Claim 31

The semiconductor device according to claim 19 , wherein the projecting semiconductor layer is an epitaxial layer grown by an epitaxial growth method.

Claim 32

The semiconductor device according to claim 24 , wherein the gate electrode is also formed on the second side surface of the center portion of the projecting semiconductor layer.