US6724019B2
Expired / Lapsed
US
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Multi-layered, single crystal field effect transistor
Assignee: Renesas Electronics Corp
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Filing: 2001-04-03
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Granted: 2004-04-20
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Expires: 2021-04-03
Abstract
Abstract A semiconductor device having an MODFET and at least one other device formed on one identical semiconductor substrate, in which an intrinsic region for the MODFET is formed by selective growth in a groove formed on a semiconductor substrate having an insulation film on the side wall of the groove, and single-crystal silicon at the bottom of the groove, is disclosed. The step between the MODFET and the at least one other device mounted together on one identical substrate can be thereby decreased, and each of the devices can be reduced in the size and integrated to a high degree, and the interconnection length can be shortened to reduce power consumption.
Inventors
- 👤 Katsuya Oda
- 👤 Katsuyoshi Washio
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 09:24
CPC Classifications
B; B82; B82Y; B82Y10/00; H; H10; H10D; H10D10/00; H10D10/80; H10D10/821; H10D10/891; H10D30/00; H10D30/01; H10D30/014; H10D30/40; H10D30/47; H10D30/471; H10D30/473; H10D84/00; H10D84/01; H10D84/0107; H10D84/0109; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/0167; H10D84/02; H10D84/03; H10D84/038; H10D84/40; H10D84/401; H10D84/80; H10D84/82; H10D84/83; H10D84/85; H10D84/856
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
134 words
A semiconductor device having a first region and a second region, comprising: a silicon substrate; a MOSFET formed in said first region; and a MODFET formed in said second region; and a field insulation film formed between said first region and said second region; wherein said MOSFET is formed on said silicon substrate, and wherein a groove us formed by a side of said field insulation film and aim upper surface of said silicon substrate in said second region, and wherein an intrinsic region of said MODFET is formed on said silicon substrate in said second region and in said groove, and wherein said MODFET is formed on said intrinsic region, and wherein an upper surface of said silicon substrate in said first region is higher than the upper surface in said second region.
Claim 2
Dependent Claim
134 words
A semiconductor device having a first region and a second region, comprising: a silicon substrate; a MOSFET formed in said first region; and a MODFET formed in said second region; and a field insulation film formed between said first region and said second region; wherein said MOSFET is formed on said silicon substrate, and wherein a groove us formed by a side of said field insulation film and aim upper surface of said silicon substrate in said second region, and wherein an intrinsic region of said MODFET is formed on said silicon substrate in said second region and in said groove, and wherein said MODFET is formed on said intrinsic region, and wherein an upper surface of said silicon substrate in said first region is higher than the upper surface in said second region.
Claim 3
Dependent Claim
32 words
The semiconductor device of claim 1 , wherein a height of the upper surface of said first region is approximately equal to a height of an upper surface of the intrinsic region.
Claim 4
Dependent Claim
23 words
The semiconductor device of claim 2 , wherein a silicon nitride film is formed between said field insulation film and said intrinsic region.
Claim 5
Dependent Claim
38 words
The semiconductor device of claim 1 , wherein the intrinsic region comprises: a multi-layered film, comprising: a buffer layer; a single-crystal silicon layer laminated on the buffer layer; amid a single-crystal silicon-germanium layer laminated on the buffer layer.
Claim 6
Dependent Claim
54 words
The semiconductor device of claim 4 wherein said MODFET comprises a P-type MODFET, and wherein time multi-layered film comprises: a carrier supply layer comprising a said single-crystal silicon-germanium layer; a spacer layer comprising a single-crystal silicon-germanium; a channel layer comprising an undoped single-crystal silicon-germanium; and a cap layer comprising a said single-crystal silicon layer.
Claim 7
Dependent Claim
17 words
The semiconductor device of claim 4 wherein the channel layer comprises a single-crystal silicon-germanium undergoing compressive strain.
Claim 8
Dependent Claim
131 words
A semiconductor device, comprising: a single semiconductor substrate having thereon a surface region; at least one non-MODFET transistor; amid a P-type MODFET, wherein said P-type MODFET amid said at least one non-MODFET transistor, are formed on said single semiconductor substrate, wherein an intrinsic region of said P-type MODFET is formed in a groove in said surface region, and wherein said P-type MODFET comprises: a multi-layered film, comprising: a buffer layer; a single-crystal silicon layer laminated on the buffer layer; a single-crystal silicon-germanium layer laminated on the buffer layer; a first spacer layer comprising said single crystal silicon-germanium layer; a channel layer comprising an undoped single-crystal silicon-germanium; a second spacer layer comprising a single-crystal silicon-germanium; a carrier supply layer comprising a single-crystal silicon-germanium; and a cap layer comprising said single-crystal silicon layer.
Claim 9
Dependent Claim
131 words
A semiconductor device, comprising: a single semiconductor substrate having thereon a surface region; at least one non-MODFET transistor; amid a P-type MODFET, wherein said P-type MODFET amid said at least one non-MODFET transistor, are formed on said single semiconductor substrate, wherein an intrinsic region of said P-type MODFET is formed in a groove in said surface region, and wherein said P-type MODFET comprises: a multi-layered film, comprising: a buffer layer; a single-crystal silicon layer laminated on the buffer layer; a single-crystal silicon-germanium layer laminated on the buffer layer; a first spacer layer comprising said single crystal silicon-germanium layer; a channel layer comprising an undoped single-crystal silicon-germanium; a second spacer layer comprising a single-crystal silicon-germanium; a carrier supply layer comprising a single-crystal silicon-germanium; and a cap layer comprising said single-crystal silicon layer.
Claim 10
Dependent Claim
18 words
The semiconductor device of claim 7 , wherein the channel layer comprises a single-crystal silicon-germanium undergoing compressive strain.
References Cited (Backward Citations)
EP0307850A1
Cited
US6350993B1
Cited
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