US6617643B1
Expired / Lapsed
US
⏱️ 0.0 years remaining
Low power tunneling metal-oxide-semiconductor (MOS) device
Assignee: RTI International
•
Filing: 2002-06-28
•
Granted: 2003-09-09
•
Expires: 2022-06-28
Abstract
Abstract A three terminal tunneling device that has a smaller voltage transition between off-current and on-current states and which also has less dependence on the lateral dimensions of the device. The device is a hybrid between a MOS transistor, a gated diode and a tunneling diode. The semiconductor device includes a lightly doped substrate of a first conductivity type. The lightly doped substrate will include a first heavily doped region of a first conductivity type formed in the substrate and a lightly doped layer of a first conductivity type disposed on the substrate and the first heavily doped region. The device also including a gate insulator layer disposed on the lightly doped layer and underlying a portion of the first heavily doped region and a gate electrode that is disposed on the gate insulator layer. Additionally, the device will include a second heavily doped region of a first conductivity formed in the substrate extending into the first heavily doped region of a first conductivity and a heavily doped region of a second conductivity formed in the substrate extending into the lightly doped substrate and spatially isolated from the first heavily doped region.
Inventors
- 👤 Scott H. Goodwin-Johansson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 23:22
CPC Classifications
H; H10; H10D; H10D12/00; H10D12/211; H10D8/00; H10D8/70
Claims Analysis
Total Claims: 36
Claim 1
Independent Claim
103 words
A semiconductor device, comprising: a lightly doped substrate of a first conductivity type; a heavily doped region of a first conductivity type disposed in the substrate; a lightly doped region of a first conductivity type disposed on the substrate and the first heavily doped region; a heavily doped region of a second conductivity type disposed in the substrate and spatially isolated from the heavily doped region of a second conductivity type; a gate insulator layer disposed on the lightly doped layer and a portion of the heavily doped region of a first conductivity type; and a gate electrode disposed on the gate insulator.
Claim 2
Dependent Claim
103 words
A semiconductor device, comprising: a lightly doped substrate of a first conductivity type; a heavily doped region of a first conductivity type disposed in the substrate; a lightly doped region of a first conductivity type disposed on the substrate and the first heavily doped region; a heavily doped region of a second conductivity type disposed in the substrate and spatially isolated from the heavily doped region of a second conductivity type; a gate insulator layer disposed on the lightly doped layer and a portion of the heavily doped region of a first conductivity type; and a gate electrode disposed on the gate insulator.
Claim 3
Dependent Claim
26 words
The semiconductor device of claim 1 , wherein the substrate comprises a lightly doped silicon layer of a first conductivity type disposed on an insulator layer.
Claim 4
Dependent Claim
25 words
The semiconductor device of claim 1 , wherein the gate insulator layer further comprises an insulator material having a higher dielectric constant than silicon dioxide.
Claim 5
Dependent Claim
39 words
The semiconductor device of claim 1 , wherein the lightly doped layer of a first conductivity type has a thickness that is predefined to provide for electron tunneling between a valence band and a conduction band during device operation.
Claim 6
Dependent Claim
31 words
The semiconductor device of claim 1 , wherein the lightly doped layer of a first conductivity type has a thickness in the range of about 100 angstroms to about 500 angstroms.
Claim 7
Dependent Claim
126 words
A semiconductor device, comprising: a lightly doped substrate of a first conductivity type; a first heavily doped region of a first conductivity type formed in the substrate; a lightly doped layer of a first conductivity type disposed on the substrate and the first heavily doped region; a gate insulator layer disposed on the lightly doped layer and a portion of the first heavily doped region; a gate electrode disposed on the gate insulator; a second heavily doped region of a first conductivity formed in the substrate and extending into the first heavily doped region of a first conductivity; and a heavily doped region of a second conductivity formed in the substrate extending into the lightly doped substrate and spatially isolated from the first heavily doped region.
Claim 8
Dependent Claim
126 words
A semiconductor device, comprising: a lightly doped substrate of a first conductivity type; a first heavily doped region of a first conductivity type formed in the substrate; a lightly doped layer of a first conductivity type disposed on the substrate and the first heavily doped region; a gate insulator layer disposed on the lightly doped layer and a portion of the first heavily doped region; a gate electrode disposed on the gate insulator; a second heavily doped region of a first conductivity formed in the substrate and extending into the first heavily doped region of a first conductivity; and a heavily doped region of a second conductivity formed in the substrate extending into the lightly doped substrate and spatially isolated from the first heavily doped region.
Claim 9
Dependent Claim
26 words
The semiconductor device of claim 6 , wherein the substrate comprises a lightly doped silicon layer of a first conductivity type disposed on an insulator layer.
Claim 10
Dependent Claim
22 words
The semiconductor device of claim 7 , wherein the lightly doped silicon layer of a first conductivity type comprises a P-type material.
Claim 11
Dependent Claim
32 words
The semiconductor device of claim 6 , wherein the first heavily doped region of a first conductivity type and the lightly doped layer of a first conductivity type comprise a P-type material.
Claim 12
Dependent Claim
52 words
The semiconductor device of claim 9 , wherein the second heavily doped region of a first conductivity type comprises a P-type material that defines the source region of the device and the heavily doped region of a second conductivity type comprises an N-type material that defines the drain region of the device.
Claim 13
Dependent Claim
32 words
The semiconductor device of claim 6 , wherein the first heavily doped region of a first conductivity type and the lightly doped layer of a first conductivity type comprise a N-type material.
Claim 14
Dependent Claim
52 words
The semiconductor device of claim 11 , wherein the second heavily doped region of a first conductivity type comprises a N-type material that defines the source region of the device and the heavily doped region of a second conductivity type comprises an P-type material that defines the drain region of the device.
Claim 15
Dependent Claim
25 words
The semiconductor device of claim 6 , wherein the gate insulator layer further comprises an insulator material having a higher dielectric constant than silicon dioxide.
Claim 16
Dependent Claim
16 words
The semiconductor device of claim 6 , wherein the gate insulator layer further comprises tantalum oxide.
Claim 17
Dependent Claim
39 words
The semiconductor device of claim 6 , wherein the lightly doped layer of a first conductivity type has a thickness that is predefined to provide for electron tunneling between a valence band and a conduction band during device operation.
Claim 18
Dependent Claim
31 words
The semiconductor device of claim 6 , wherein the lightly doped layer of a first conductivity type has a thickness in the range of about 100 angstroms to about 500 angstroms.
Claim 19
Dependent Claim
44 words
The semiconductor device of claim 6 , wherein the spatial isolation between the heavily doped region of a second conductivity and the first heavily doped region of a first conductivity provides in operation a reversed biased diode to an applied drain to source voltage.
Claim 20
Dependent Claim
39 words
The semiconductor device of claim 6 , wherein a portion of the first heavily doped region of a first conductivity generally underlies the gate electrode to cause sharp valence and conduction band bending upon an increase in gate bias.
Claim 21
Dependent Claim
119 words
A semiconductor device comprising: a substrate comprising a lightly doped P-type silicon layer disposed on an insulator layer; a heavily doped P-type region formed in the silicon layer of the substrate; a lightly doped P-type layer disposed on the silicon layer and the heavily doped P-type region; a gate insulator layer disposed on the lightly doped P-type layer and a portion of the heavily doped P-type region; a gate electrode disposed on the gate insulator; a P-type source region formed in the silicon layer of the substrate extending into the heavily doped P-type region; and a N-type drain region formed in the substrate extending into the lightly doped P-type silicon layer and spatially isolated from the heavily doped region.
Claim 22
Dependent Claim
119 words
A semiconductor device comprising: a substrate comprising a lightly doped P-type silicon layer disposed on an insulator layer; a heavily doped P-type region formed in the silicon layer of the substrate; a lightly doped P-type layer disposed on the silicon layer and the heavily doped P-type region; a gate insulator layer disposed on the lightly doped P-type layer and a portion of the heavily doped P-type region; a gate electrode disposed on the gate insulator; a P-type source region formed in the silicon layer of the substrate extending into the heavily doped P-type region; and a N-type drain region formed in the substrate extending into the lightly doped P-type silicon layer and spatially isolated from the heavily doped region.
Claim 23
Dependent Claim
25 words
The semiconductor device of claim 19 , wherein the gate insulator layer further comprises an insulator material having a higher dielectric constant than silicon dioxide.
Claim 24
Dependent Claim
16 words
The semiconductor device of claim 19 , wherein the gate insulator layer further comprises tantalum oxide.
Claim 25
Dependent Claim
33 words
The semiconductor device of claim 19 , wherein the lightly doped P-type layer has a thickness that is predefined to provide for electron tunneling between valence band and conduction band during device operation.
Claim 26
Dependent Claim
27 words
The semiconductor device of claim 19 , wherein the lightly doped P-type layer has a thickness in the range of about 100 angstroms to about 500 angstroms.
Claim 27
Dependent Claim
36 words
The semiconductor device of claim 19 , wherein the spatial isolation between the N-type drain region and the heavily doped P-type region provides in operation a reversed biased diode to an applied drain to source voltage.
Claim 28
Dependent Claim
39 words
The semiconductor device of claim 19 , wherein a portion of the heavily doped P-type region of a first conductivity generally underlies the gate electrode to cause sharp valence and conduction band bending upon an increase in gate bias.
Claim 29
Dependent Claim
119 words
A semiconductor device comprising: a substrate comprising a lightly doped N-type silicon layer disposed on an insulator layer; a heavily doped N-type region formed in the silicon layer of the substrate; a lightly doped N-type layer disposed on the silicon layer and the heavily doped N-type region; a gate insulator layer disposed on the lightly doped N-type layer and a portion of the heavily doped N-type region; a gate electrode disposed on the gate insulator; a N-type source region formed in the silicon layer of the substrate extending into the heavily doped N-type region; and a P-type drain region formed in the substrate extending into the lightly doped N-type silicon layer and spatially isolated from the heavily doped region.
Claim 30
Dependent Claim
119 words
A semiconductor device comprising: a substrate comprising a lightly doped N-type silicon layer disposed on an insulator layer; a heavily doped N-type region formed in the silicon layer of the substrate; a lightly doped N-type layer disposed on the silicon layer and the heavily doped N-type region; a gate insulator layer disposed on the lightly doped N-type layer and a portion of the heavily doped N-type region; a gate electrode disposed on the gate insulator; a N-type source region formed in the silicon layer of the substrate extending into the heavily doped N-type region; and a P-type drain region formed in the substrate extending into the lightly doped N-type silicon layer and spatially isolated from the heavily doped region.
Claim 31
Dependent Claim
25 words
The semiconductor device of claim 26 , wherein the gate insulator layer further comprises an insulator material having a higher dielectric constant than silicon dioxide.
Claim 32
Dependent Claim
16 words
The semiconductor device of claim 26 , wherein the gate insulator layer further comprises tantalum oxide.
Claim 33
Dependent Claim
33 words
The semiconductor device of claim 26 , wherein the lightly doped N-type layer has a thickness that is predefined to provide for electron tunneling between valence band and conduction band during device operation.
Claim 34
Dependent Claim
27 words
The semiconductor device of claim 26 , wherein the lightly doped N-type layer has a thickness in the range of about 100 angstroms to about 500 angstroms.
Claim 35
Dependent Claim
36 words
The semiconductor device of claim 26 , wherein the spatial isolation between the P-type drain region and the heavily doped N-type region provides in operation a reversed biased diode to an applied drain to source voltage.
Claim 36
Dependent Claim
39 words
The semiconductor device of claim 26 , wherein a portion of the heavily doped N-type region of a first conductivity generally underlies the gate electrode to cause sharp valence and conduction band bending upon an increase in gate bias.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2006-09-08 | 2007-03-10 | 2007-09-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2010-09-08 | 2011-03-10 | 2011-09-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2014-09-08 | 2015-03-10 | 2015-09-09 | $7700.00 | Window Closed / Lapsed |