US6555839B2
Expired / Lapsed
US
⏱️ 0.0 years remaining
Buried channel strained silicon FET using a supply layer created through ion implantation
Assignee: Taiwan Semiconductor Manufacturing Co TSMC Ltd
•
Filing: 2001-05-16
•
Granted: 2003-04-29
•
Expires: 2021-05-16
Abstract
Abstract A circuit including at least one strained channel, enhancement mode FET, and at least one strained channel, depletion mode FET. The depletion mode FET includes an ion implanted dopant supply. In exemplary embodiments, the FETs are surface channel or buried channel MOSFETS. In another exemplary embodiment, the FETs are interconnected to form an inverter.
Inventors
- 👤 Eugene A. Fitzgerald
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 14:50
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/015; H10D30/40; H10D30/47; H10D30/471; H10D30/473; H10D30/60; H10D30/637; H10D30/67; H10D30/674; H10D30/6741; H10D30/6748; H10D30/751; H10D30/791; H10D30/798; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0128; H10D84/02; H10D84/03; H10D84/038; H10D84/80; H10D84/82; H10D84/83; H10D84/8311; H10D84/84; H10P; H10P90/00; H10P90/19; H10P90/1904; H10P90/1906; H10W; H10W10/00; H10W10/10; H10W10/181; Y; Y10; Y10S; Y10S438/00; Y10S438/933
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
50 words
A circuit comprising: a substantially relaxed SiGe layer; at least one strained channel, enhancement mode FET formed on said substantially relaxed SiGe layer; and at least one strained channel, depletion mode FET formed on said substantially relaxed SiGe layer, wherein said depletion mode FET comprises an ion implanted dopant supply.
Claim 2
Dependent Claim
50 words
A circuit comprising: a substantially relaxed SiGe layer; at least one strained channel, enhancement mode FET formed on said substantially relaxed SiGe layer; and at least one strained channel, depletion mode FET formed on said substantially relaxed SiGe layer, wherein said depletion mode FET comprises an ion implanted dopant supply.
Claim 3
Dependent Claim
14 words
The circuit of claim 1 , wherein the enhancement mode FET is a MOSFET.
Claim 4
Dependent Claim
14 words
The circuit of claim 1 , wherein the depletion mode FET is a MOSFET.
Claim 5
Dependent Claim
16 words
The circuit of claim 1 , wherein the enhancement mode FET is a surface channel MOSFET.
Claim 6
Dependent Claim
16 words
The circuit of claim 4 , wherein the depletion mode FET is a buried channel MOSFET.
Claim 7
Dependent Claim
16 words
The circuit of claim 1 , wherein the depletion mode FET is a surface channel MOSFET.
Claim 8
Dependent Claim
16 words
The circuit of claim 1 , wherein the enhancement mode FET is a buried channel MOSFET.
Claim 9
Dependent Claim
16 words
The circuit of claim 1 , wherein the depletion mode FET is a buried channel MOSFET.
Claim 10
Dependent Claim
12 words
The circuit of claim 1 , wherein the circuit is an inverter.
Claim 11
Dependent Claim
22 words
The circuit of claim 1 , wherein the enhancement mode FET and the depletion mode FET are interconnected to form an inverter.
Claim 12
Dependent Claim
50 words
An inverter comprising: a substantially relaxed SiGe layer; a strained buried channel depletion mode FET formed on said substantially relaxed-SiGe layer; and a strained surface channel enhancement mode FET formed on said substantially relaxed SiGe layer, wherein said strained buried channel depletion mode FET comprises an ion implanted dopant supply.
Claim 13
Dependent Claim
50 words
An inverter comprising: a substantially relaxed SiGe layer; a strained buried channel depletion mode FET formed on said substantially relaxed-SiGe layer; and a strained surface channel enhancement mode FET formed on said substantially relaxed SiGe layer, wherein said strained buried channel depletion mode FET comprises an ion implanted dopant supply.
Claim 14
Dependent Claim
10 words
In an integrated circuit, the inverter of claim 11 .
Claim 15
Dependent Claim
51 words
An inverter comprising: a substantially relaxed SiGe layer; a strained buried channel depletion mode MOSFET formed on said substantially relaxed SiGe layer; and a strained surface channel enhancement mode MOSFET formed on said substantially relaxed SiGe layer, wherein said strained buried channel depletion mode MOSFET comprises an ion implanted dopant supply.
Claim 16
Dependent Claim
51 words
An inverter comprising: a substantially relaxed SiGe layer; a strained buried channel depletion mode MOSFET formed on said substantially relaxed SiGe layer; and a strained surface channel enhancement mode MOSFET formed on said substantially relaxed SiGe layer, wherein said strained buried channel depletion mode MOSFET comprises an ion implanted dopant supply.
Claim 17
Dependent Claim
10 words
In an integrated circuit, the inverter of claim 13 .
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