Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
188 words
A semiconductor device comprising a heterojunction field-effect transistor which is formed on a semiconductor substrate, wherein a channel region of said heterojunction field-effect transistor comprises: a Si layer; a Si 1-x-y Ge x C y layer (0<x<1, 0<y<1) which is formed as coming in contact with said Si layer and in which strain caused by the difference in lattice constant between the Si layer and the Si 1-x-y Ge x C y layer is 0.25% or less; and a carrier accumulation layer formed in a portion of a heterointerface between said Si layer and said Si 1-x-y Ge x C y layer, which portion is included in said Si 1-x-y Ge x C y layer and adjacent to said Si layer, said carrier accumulation layer confining negative carriers; a carrier supply layer for supplying carriers to said carrier accumulation layer which is formed in that portion of said Si layer which is adjacent to said Si 1-x-y Ge x C y ; a gate insulating film formed on or above the Si 1-x-y Ge x C y layer; and a gate electrode formed on the gate insulating film.
Claim 2
Dependent Claim
188 words
A semiconductor device comprising a heterojunction field-effect transistor which is formed on a semiconductor substrate, wherein a channel region of said heterojunction field-effect transistor comprises: a Si layer; a Si 1-x-y Ge x C y layer (0<x<1, 0<y<1) which is formed as coming in contact with said Si layer and in which strain caused by the difference in lattice constant between the Si layer and the Si 1-x-y Ge x C y layer is 0.25% or less; and a carrier accumulation layer formed in a portion of a heterointerface between said Si layer and said Si 1-x-y Ge x C y layer, which portion is included in said Si 1-x-y Ge x C y layer and adjacent to said Si layer, said carrier accumulation layer confining negative carriers; a carrier supply layer for supplying carriers to said carrier accumulation layer which is formed in that portion of said Si layer which is adjacent to said Si 1-x-y Ge x C y ; a gate insulating film formed on or above the Si 1-x-y Ge x C y layer; and a gate electrode formed on the gate insulating film.
Claim 3
Dependent Claim
45 words
A semiconductor device according to claim 1 , wherein the composition rates of the respective elements in said Si 1-x-y Ge x C y layer are adjusted such that said Si 1-x-y Ge x C y layer has a lattice match to said Si layer.
Claim 4
Dependent Claim
39 words
A semiconductor device according to claim 1 , wherein said Si 1-x-y Ge x C y layer has a lattice constant smaller than that of said Si layer and has such a thickness as not to induce lattice relaxation.
Claim 5
Dependent Claim
36 words
A semiconductor device according to claim 1 , further comprising a MOS transistor which is formed on said semiconductor substrate and in which a semiconductor layer formed of a single element serves as a channel region.
Claim 6
Dependent Claim
22 words
A semiconductor device according to claim 1 , wherein said Si 1-x-y Ge x C y layer is a quantum well region.
Claim 7
Dependent Claim
59 words
A semiconductor device according to claim 1 , wherein: each of said source-drain regions comprises a first semiconductor layer and a second semiconductor layer greater in band gap than said first semiconductor layer; and there is further formed a source-drain contact layer which is made of a conductive layer and which is formed immediately above said first semiconductor layer.
Claim 8
Dependent Claim
23 words
A semiconductor device according to claim 1 , wherein the composition rate y of C is in the range from 0.003 to 0.03.
Claim 9
Dependent Claim
261 words
A semiconductor device comprising a first heterojunction field-effect transistor and a second heterojunction field-effect transistor which are formed on a semiconductor substrate, wherein a first channel region of said first heterojunction field-effect transistor comprises: a first Si layer; a Si 1-x-y Ge x C y layer (0<x<1, 0<y<1) which is formed as coming in contact with said first Si layer and in which strain caused by the difference in lattice constant between the Si layer and the Si 1-x-y Ge x C y layer is 0.25% or less; a first carrier accumulation layer formed in a portion of a heterointerface between said first Si layer and said Si 1-x-y Ge x C y layer, which portion is included in said Si 1-x-y Ge x C y layer and adjacent to said first Si layer, said first carrier accumulation layer confining negative carriers; a gate insulating film formed on or above the Si 1-x-y Ge x C y layer; and a gate electrode formed on the gate insulating film; and a second channel region of said second heterojunction field-effect transistor comprises: a second Si layer; a SiGe layer formed as coming in contact with said second Si layer; and a second carrier accumulation layer formed in that portion of said SiGe layer adjacent to said second Si layer, said second accumulation layer confining positive carriers, and further comprising a carrier supply layer for supplying carriers to said carrier accumulation layer which is formed in that portion of said Si layer which is adjacent to said Si 1-x-y Ge x C y layer.
Claim 10
Dependent Claim
261 words
A semiconductor device comprising a first heterojunction field-effect transistor and a second heterojunction field-effect transistor which are formed on a semiconductor substrate, wherein a first channel region of said first heterojunction field-effect transistor comprises: a first Si layer; a Si 1-x-y Ge x C y layer (0<x<1, 0<y<1) which is formed as coming in contact with said first Si layer and in which strain caused by the difference in lattice constant between the Si layer and the Si 1-x-y Ge x C y layer is 0.25% or less; a first carrier accumulation layer formed in a portion of a heterointerface between said first Si layer and said Si 1-x-y Ge x C y layer, which portion is included in said Si 1-x-y Ge x C y layer and adjacent to said first Si layer, said first carrier accumulation layer confining negative carriers; a gate insulating film formed on or above the Si 1-x-y Ge x C y layer; and a gate electrode formed on the gate insulating film; and a second channel region of said second heterojunction field-effect transistor comprises: a second Si layer; a SiGe layer formed as coming in contact with said second Si layer; and a second carrier accumulation layer formed in that portion of said SiGe layer adjacent to said second Si layer, said second accumulation layer confining positive carriers, and further comprising a carrier supply layer for supplying carriers to said carrier accumulation layer which is formed in that portion of said Si layer which is adjacent to said Si 1-x-y Ge x C y layer.
Claim 11
Dependent Claim
17 words
A semiconductor device according to claim 8 , wherein said SiGe layer is a quantum well region.
Claim 12
Dependent Claim
45 words
A semiconductor device according to claim 8 , wherein the composition rates of the respective elements in said Si 1-x-y Ge x C y layer are adjusted such that said Si 1-x-y Ge x C y layer has a lattice match to said Si layer.
Claim 13
Dependent Claim
23 words
A semiconductor device according to claim 8 , wherein the composition rate y of C is in the range from 0.003 to 0.03.