Field-effect transistor and method of producing the same

Claim 1

A semiconductor device comprising a field-effect transistor which is formed on a portion of a semiconductor substrate and which comprises a gate electrode, source-drain regions and a channel region between said source-drain regions, said channel region comprises: a Si layer; a Si 1-x-y Ge x C y layer (0≦x≦1, 0<y≦1) which is formed as coming in contact with said Si layer and in which the composition rate y of C is in the range from 0.01 to 0.03; and a carrier accumulation layer formed in that portion of said Si 1-x-y Ge x C y layer which is adjacent to said Si layer.

Claim 24

A method of producing a semiconductor device including an n-channel field-effect transistor and a p-channel field-effect transistor, comprising: a first step of forming, on a semiconductor substrate, a first Si layer and a first Si 1-x-y Ge x C y layer (0≦x≦1, 0<y≦1) which comes in contact with said first Si layer and in which a first carrier accumulation layer serving as a channel of said n-channel field-effect transistor is formed in that portion of said first Si 1-x-y Ge x C y layer which is adjacent to said first Si layer; a second step of forming, on said semiconductor substrate, a second Si layer and a second Si 1-x-y Ge x C y layer (0≦x≦1, 0≦y≦1) which comes in contact with said second Si layer, which is different in band gap from said first Si 1-x-y Ge x C y layer and in which a second carrier accumulation layer serving as a channel of said p-channel field-effect transistor is formed in that portion of said second Si 1-x-y Ge x C y layer which is adjacent to said second Si layer; a third step of depositing a conductive layer on said first or second Si 1-x-y Ge x C y layer whichever is the upper, and patterning said conductive layer to form the gate electrodes of said n- and p-channel field-effect transistors; and a fourth step of introducing, with said gate electrodes of said field-effect transistors used as masks, (i) n-type impurity into the n-channel field-effect transistor forming region in depth which reaches at least said first carrier accumulation layer and (ii) p-type impurity into the p-channel field-effect transistor forming region in depth which reaches at least said second carrier accumulation layer, thus forming source-drain regions of said n- and p-channel field-effect transistors.

Claim 25

A method of producing a semiconductor device which has a first semiconductor layer including a Si 1-x-y Ge x C y layer (0≦x≦1, 0≦y≦1), a second semiconductor layer different in band gap from said first semiconductor layer and a carrier accumulation layer serving as a channel formed in the vicinity of the interface between said first and second semiconductor layers, and which serves as a field-effect transistor, said method comprising: a first step of successively forming, on a field-effect transistor forming region of a semiconductor substrate, a third semiconductor layer and a fourth semiconductor layer greater in band gap than said third semiconductor layer; a second step of depositing a conductive layer on said fourth semiconductor layer and patterning said conductive layer to form a gate electrode; a third step of introducing impurity into those portions of said field-effect transistor forming region which are located at both lateral sides of said gate electrode, thus forming source-drain regions, said impurity being introduced in depth which reaches at least said carrier accumulation layer; a fourth step of etching said fourth semiconductor layer in said source-drain regions until at least said third semiconductor layer is exposed; and a fifth step of forming, on the exposed surface of said third semiconductor layer, source-drain contact layers made of conductive layers low in resistance.