US6433382B1
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Split-gate vertically oriented EEPROM device and process
Assignee: NXP USA Inc
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Filing: 1995-04-06
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Granted: 2002-08-13
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Expires: 2015-04-06
Abstract
Abstract A split-gate EEPROM transistor includes a channel region ( 22 ) formed in a vertically disposed semiconductor body ( 58 ) and residing intermediate to a drain region ( 26 ) and a source region ( 24 ). A select gate electrode ( 28 ) is horizontally disposed on a semiconductor substrate ( 20 ). A floating gate electrode ( 30 ) resides adjacent to the channel region ( 22 ) and overlies the select gate electrode ( 28 ). A control gate electrode ( 32 ) resides adjacent to the control gate electrode ( 30 ) and also overlies the select gate electrode ( 28 ). In operation, the select gate electrode ( 28 ) regulates the flow of electrical charge from the source region ( 24 ) into the channel region ( 22 ), and provides a field plate electrical isolation for adjacent memory cells in an EEPROM array.
Inventors
- 👤 Marius Orlowski
- 👤 Kuo-Tung Chang
- 👤 Keith E. Witek
- 👤 Jon Fitch
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 16:53
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/68; H10D30/681; H10D30/684; H10D30/685; G; G11; G11C; G11C16/00; G11C16/02; G11C16/04; G11C16/0408; G11C16/0433; H10D30/6891
Claims Analysis
Total Claims: 49
Claim 1
Independent Claim
94 words
A semiconductor device comprising: a substrate having a vertically disposed semiconductor body thereon; a doped region in the substrate separating the vertically disposed semiconductor body from the substrate; a horizontally disposed gate electrode overlying the substrate adjacent to the vertically disposed semiconductor body; and a first vertically disposed gate electrode overlying the horizontally disposed gate electrode and positioned adjacent to the vertically disposed semiconductor body, the vertically disposed gate electrode being electrically floating wherein the horizontally disposed gate electrode regulates a flow of electrical charge into the vertically disposed semiconductor body from the substrate.
Claim 2
Dependent Claim
94 words
A semiconductor device comprising: a substrate having a vertically disposed semiconductor body thereon; a doped region in the substrate separating the vertically disposed semiconductor body from the substrate; a horizontally disposed gate electrode overlying the substrate adjacent to the vertically disposed semiconductor body; and a first vertically disposed gate electrode overlying the horizontally disposed gate electrode and positioned adjacent to the vertically disposed semiconductor body, the vertically disposed gate electrode being electrically floating wherein the horizontally disposed gate electrode regulates a flow of electrical charge into the vertically disposed semiconductor body from the substrate.
Claim 3
Dependent Claim
27 words
The device of claim 1 further comprising a second vertically disposed gate electrode overlying the horizontally disposed gate electrode and adjacent the first vertically disposed gate electrode.
Claim 4
Dependent Claim
27 words
The device of claim 1 further comprising a diffused region in the substrate electrically connecting the doped region with a plurality of doped regions in the substrate.
Claim 5
Dependent Claim
34 words
The device of claim 1 further comprising a inversion region in the substrate underlying the horizontally disposed gate electrode and electrically connecting the doped region with a plurality of doped regions in the substrate.
Claim 6
Dependent Claim
127 words
A semiconductor device comprising: a semiconductor substrate having a source region therein; a vertically disposed channel region overlying the source region; a select gate electrode overlying the semiconductor substrate adjacent to the vertically disposed channel region; a dielectric layer overlying the semiconductor substrate and the vertically disposed channel region and separating the select gate electrode therefrom; a floating gate electrode overlying the select gate electrode and surrounding a portion of the vertically disposed channel region; and a control gate electrode overlying the select gate electrode and surrounding the floating gate electrode, wherein the control gate electrode controls an electrical charge state of the floating gate electrode, and wherein the select gate electrode regulates flow of electrical charge into the vertically disposed channel region from the semiconductor substrate.
Claim 7
Dependent Claim
127 words
A semiconductor device comprising: a semiconductor substrate having a source region therein; a vertically disposed channel region overlying the source region; a select gate electrode overlying the semiconductor substrate adjacent to the vertically disposed channel region; a dielectric layer overlying the semiconductor substrate and the vertically disposed channel region and separating the select gate electrode therefrom; a floating gate electrode overlying the select gate electrode and surrounding a portion of the vertically disposed channel region; and a control gate electrode overlying the select gate electrode and surrounding the floating gate electrode, wherein the control gate electrode controls an electrical charge state of the floating gate electrode, and wherein the select gate electrode regulates flow of electrical charge into the vertically disposed channel region from the semiconductor substrate.
Claim 8
Dependent Claim
29 words
The device of claim 5 further comprising a diffused region in the semiconductor substrate electrically connecting the source region with a plurality of source regions in the semiconductor substrate.
Claim 9
Dependent Claim
35 words
The device of claim 5 further comprising an inversion region in the semiconductor substrate underlying the select gate electrode and electrically connecting the source region with a plurality of doped regions in the semiconductor substrate.
Claim 10
Dependent Claim
24 words
The device of claim 5 further comprising a drain region, wherein the vertically disposed channel region separates the drain region from the source region.
Claim 11
Dependent Claim
99 words
A semiconductor device comprising: a plurality of EEPROM memory cells each having a horizontally disposed select gate electrode overlying a substrate, and first vertically disposed channel region formed through a first opening in the select gate electrode and second vertically disposed channel region formed through an opening in the select gate electrode, wherein each of the first and second channel regions is bounded by a floating gate electrode and a control gate electrode which bounds each floating gate electrode, and wherein the select gate electrode physically isolates the floating gate electrode and the control gate electrode from the substrate.
Claim 12
Dependent Claim
99 words
A semiconductor device comprising: a plurality of EEPROM memory cells each having a horizontally disposed select gate electrode overlying a substrate, and first vertically disposed channel region formed through a first opening in the select gate electrode and second vertically disposed channel region formed through an opening in the select gate electrode, wherein each of the first and second channel regions is bounded by a floating gate electrode and a control gate electrode which bounds each floating gate electrode, and wherein the select gate electrode physically isolates the floating gate electrode and the control gate electrode from the substrate.
Claim 13
Dependent Claim
49 words
The semiconductor device of claim 9 wherein an adjacent EEPROM cell is formed laterally adjacent the plurality of EEPROM memory cells wherein a current electrode of the adjacent EEPROM cell is coupled to a current electrode of only one EEPROM memory cell in the plurality of EEPROM memory cells.
Claim 14
Dependent Claim
136 words
A semiconductor device comprising: a substrate; a first transistor overlying the substrate, the first transistor having a first current electrode overlying a second current electrode wherein the first and second current electrodes are separated bye a channel region, a floating gate electrode laterally adjacent the channel region, and a control gate electrode laterally adjacent the floating gate electrode; and a second transistor overlying the first transistor and being serially coupled to the first transistor, the second transistor having a first current electrode overlying a second current electrode, a channel region separating the first and second current electrodes, and a select gate electrode laterally adjacent the channel region, wherein the first transistor is a floating gate storage transistor for storing a logic bit value and the second transistor is a select gate for selecting the first transistor.
Claim 15
Dependent Claim
136 words
A semiconductor device comprising: a substrate; a first transistor overlying the substrate, the first transistor having a first current electrode overlying a second current electrode wherein the first and second current electrodes are separated bye a channel region, a floating gate electrode laterally adjacent the channel region, and a control gate electrode laterally adjacent the floating gate electrode; and a second transistor overlying the first transistor and being serially coupled to the first transistor, the second transistor having a first current electrode overlying a second current electrode, a channel region separating the first and second current electrodes, and a select gate electrode laterally adjacent the channel region, wherein the first transistor is a floating gate storage transistor for storing a logic bit value and the second transistor is a select gate for selecting the first transistor.
Claim 16
Dependent Claim
26 words
The semiconductor device of claim 11 wherein a diffusion region is formed within the substrate and coupled to the second current electrode of the first transistor.
Claim 17
Dependent Claim
35 words
The semiconductor device of claim 11 wherein the floating gate electrode is a donut-shaped silicon member which surrounds the channel region of the first transistor wherein the channel region is a cylindrical region of silicon.
Claim 18
Dependent Claim
60 words
The semiconductor device of claim 11 wherein one of either the first and second transistor has a gate dielectric region which comprises a first dielectric region formed by a first means and a second dielectric region formed adjacent the first dielectric region where the second dielectric region is formed by a second means that is different from the first means.
Claim 19
Dependent Claim
33 words
The semiconductor device of claim 14 wherein the gate dielectric region is exposed to one of either nitrogen or fluorine to form a nitrogen or fluorine rich region within the gate dielectric region.
Claim 20
Dependent Claim
31 words
The semiconductor device of claim 14 wherein the gate dielectric region is exposed to both nitrogen and fluorine to form a nitrogen and fluorine rich region within the gate dielectric region.
Claim 21
Dependent Claim
22 words
The semiconductor device of claim 11 wherein a metallic conductor line is coupled to the first current electrode of the second transistor.
Claim 22
Dependent Claim
156 words
A semiconductor device comprising: a substrate; a first transistor overlying the substrate, the first transistor having a first current electrode underlying a channel region, and a select gate electrode laterally adjacent the channel region; and a second transistor overlying the first transistor and being serially coupled to the first transistor, the second transistor having a second current electrode overlying the channel region wherein the first and second current electrodes are separated by the channel region, a floating gate electrode adjacent the channel region, wherein the floating gate electrode is further characterized as a spacer which surrounds the channel region of the second transistor, and wherein the channel region of the second transistor is a cylindrical region and a control gate electrode laterally adjacent the floating gate electrode, wherein the second transistor is a floating gate storage transistor for storing a logic bit value and the first transistor is a select gate for selecting the second transistor.
Claim 23
Dependent Claim
156 words
A semiconductor device comprising: a substrate; a first transistor overlying the substrate, the first transistor having a first current electrode underlying a channel region, and a select gate electrode laterally adjacent the channel region; and a second transistor overlying the first transistor and being serially coupled to the first transistor, the second transistor having a second current electrode overlying the channel region wherein the first and second current electrodes are separated by the channel region, a floating gate electrode adjacent the channel region, wherein the floating gate electrode is further characterized as a spacer which surrounds the channel region of the second transistor, and wherein the channel region of the second transistor is a cylindrical region and a control gate electrode laterally adjacent the floating gate electrode, wherein the second transistor is a floating gate storage transistor for storing a logic bit value and the first transistor is a select gate for selecting the second transistor.
Claim 24
Dependent Claim
172 words
A semiconductor device comprising: a first transistor having a first channel region and a select gate having a first vertically-oriented sidewall which is laterally adjacent the first channel region and a first circumference, current flowing in the first channel region substantially parallel to the first vertically-oriented sidewall and entirely within the first circumference, the first transistor being oriented such that an axis passes centrally through the first channel region; and a second transistor having a second channel region where the second transistor is electrically coupled in series to the first transistor and being oriented such that the axis passes centrally through the second channel region, the second transistor having a floating gate which has a second vertically-oriented sidewall laterally adjacent the second channel region and a control gate laterally adjacent the floating gate, the floating gate having a second circumference where current flows in the second channel region substantially parallel to the second vertically-oriented sidewall and within the second circumference, the first and second transistors overlying a top surface of a substrate.
Claim 25
Dependent Claim
172 words
A semiconductor device comprising: a first transistor having a first channel region and a select gate having a first vertically-oriented sidewall which is laterally adjacent the first channel region and a first circumference, current flowing in the first channel region substantially parallel to the first vertically-oriented sidewall and entirely within the first circumference, the first transistor being oriented such that an axis passes centrally through the first channel region; and a second transistor having a second channel region where the second transistor is electrically coupled in series to the first transistor and being oriented such that the axis passes centrally through the second channel region, the second transistor having a floating gate which has a second vertically-oriented sidewall laterally adjacent the second channel region and a control gate laterally adjacent the floating gate, the floating gate having a second circumference where current flows in the second channel region substantially parallel to the second vertically-oriented sidewall and within the second circumference, the first and second transistors overlying a top surface of a substrate.
Claim 26
Dependent Claim
23 words
The semiconductor device of claim 19 wherein the first transistor overlies the second transistor and the second transistor is coupled to a substrate.
Claim 27
Dependent Claim
19 words
The semiconductor device of claim 20 wherein the second transistor is coupled to a diffusion region within the substrate.
Claim 28
Dependent Claim
23 words
The semiconductor device of claim 19 wherein the second transistor overlies the first transistor and the first transistor is coupled to a substrate.
Claim 29
Dependent Claim
19 words
The semiconductor device of claim 22 wherein the first transistor is coupled to a diffusion region within the substrate.
Claim 30
Dependent Claim
183 words
A semiconductor device comprising: a first transistor having a first current electrodes overlying a second current electrode where a first channel region physically separates the first current electrode from the second current electrode, the first transistor being oriented such that an axis passes centrally through the first current electrode, the second current electrode and the first channel region, the first transistor having a select gate laterally adjacent the first channel region; and a second transistor having a third current electrode overlying a fourth current electrode where a second channel region physically separates the third current electrode from the fourth current electrode, the second transistor being electrically coupled in series to the first transistor and being oriented such that the axis passes centrally through the third current electrode, the fourth current electrode and the second channel region, the second transistor having a floating gate laterally adjacent the second channel region and a control gate laterally adjacent the floating gate, wherein the first, second, third and fourth current electrodes are epitaxially grown material from a substrate and have a atomic structure similar to the substrate.
Claim 31
Dependent Claim
183 words
A semiconductor device comprising: a first transistor having a first current electrodes overlying a second current electrode where a first channel region physically separates the first current electrode from the second current electrode, the first transistor being oriented such that an axis passes centrally through the first current electrode, the second current electrode and the first channel region, the first transistor having a select gate laterally adjacent the first channel region; and a second transistor having a third current electrode overlying a fourth current electrode where a second channel region physically separates the third current electrode from the fourth current electrode, the second transistor being electrically coupled in series to the first transistor and being oriented such that the axis passes centrally through the third current electrode, the fourth current electrode and the second channel region, the second transistor having a floating gate laterally adjacent the second channel region and a control gate laterally adjacent the floating gate, wherein the first, second, third and fourth current electrodes are epitaxially grown material from a substrate and have a atomic structure similar to the substrate.
Claim 32
Dependent Claim
23 words
The semiconductor device of claim 24 wherein the second and third current electrodes are coupled together to form a single common current electrode.
Claim 33
Independent Claim
151 words
A method for forming a semiconductor device comprising the steps of: providing a diffusion region which is made of a material capable of selective growth; growing a first current electrode vertically from the diffusion region; growing a first channel region portion vertically from the first current electrode; growing a second channel region portion vertically from the first channel region portion; forming a third current electrode coupled to the second channel region; forming a floating gate electrode laterally adjacent a first selected region selected from a group consisting of: the first channel region portion and the second channel region portion; forming a select gate electrode laterally adjacent a second selected region selected from a group consisting of: the first channel region portion and the second channel region portion, wherein the second selected region is different from the first selected region; and forming a control gate electrode laterally adjacent the floating gate electrode.
Claim 34
Independent Claim
151 words
A method for forming a semiconductor device comprising the steps of: providing a diffusion region which is made of a material capable of selective growth; growing a first current electrode vertically from the diffusion region; growing a first channel region portion vertically from the first current electrode; growing a second channel region portion vertically from the first channel region portion; forming a third current electrode coupled to the second channel region; forming a floating gate electrode laterally adjacent a first selected region selected from a group consisting of: the first channel region portion and the second channel region portion; forming a select gate electrode laterally adjacent a second selected region selected from a group consisting of: the first channel region portion and the second channel region portion, wherein the second selected region is different from the first selected region; and forming a control gate electrode laterally adjacent the floating gate electrode.
Claim 35
Dependent Claim
39 words
The method of claim 26 further comprising the step of: growing a second current electrode vertically from the first channel region portion wherein the second current electrode separates the first channel region portion from the second channel region portion.
Claim 36
Independent Claim
109 words
A method for forming a semiconductor device comprising the steps of: providing a substrate; forming a vertically-oriented conductive region overlying and contacted to the substrate, the vertically-oriented conductive region having a first current electrode at a bottom portion of the vertically-oriented conductive region, a first channel region portion overlying the first current electrode, a second channel region portion overlying the first channel region portion, and a second current electrode overlying the second channel region portion; forming a select gate electrode laterally adjacent the second channel region portion; forming a floating gate electrode laterally adjacent the first channel region portion; and forming a control electrode adjacent the floating gate. electrode.
Claim 37
Independent Claim
109 words
A method for forming a semiconductor device comprising the steps of: providing a substrate; forming a vertically-oriented conductive region overlying and contacted to the substrate, the vertically-oriented conductive region having a first current electrode at a bottom portion of the vertically-oriented conductive region, a first channel region portion overlying the first current electrode, a second channel region portion overlying the first channel region portion, and a second current electrode overlying the second channel region portion; forming a select gate electrode laterally adjacent the second channel region portion; forming a floating gate electrode laterally adjacent the first channel region portion; and forming a control electrode adjacent the floating gate. electrode.
Claim 38
Dependent Claim
42 words
The method of claim 28 wherein the step of forming a vertically-oriented conductive region comprises: forming a third current electrode between the first and second channel region portions to physically isolate the first channel region portion from the second channel region portion.
Claim 39
Dependent Claim
38 words
The method of claim 28 wherein the step of forming a floating gate electrode comprises: depositing a conformal layer of silicon-comprising material and etching the silicon-comprising material to form a sidewall structure which forms the floating gate electrode.
Claim 40
Dependent Claim
53 words
The method of claim 28 wherein the step of forming a control gate electrode comprises: forming a sidewall of the control gate electrode where the sidewall is perpendicular to a surface of the substrate; and recessing the sidewall of the control gate electrode via a laterally-oriented etch process to form a recessed region.
Claim 41
Dependent Claim
51 words
The method of claim 31 wherein the step of recessing the sidewall further comprises: forming the floating gate electrode within the recessed region. 33 .The method of claim 28 the step of forming a vertically-oriented conductive region further comprises: forming the vertically-oriented conductive region by selectively growing the vertically-oriented conductive region.
Claim 42
Dependent Claim
48 words
The method of claim 28 wherein the step of forming a vertically-oriented conductive region comprises: forming the vertically-oriented conductive region by doping the vertically-oriented conductive region to form the first and second current electrodes, the doping being performed by one of either: ion implantation, diffusion, or insitu doping.
Claim 43
Dependent Claim
50 words
The method of claim 28 wherein the step of forming a vertically-oriented conductive region further comprises: forming the vertically-oriented conductive region by doping the vertically-oriented conductive region to form the first and second channel region portions, the doping being performed by one of either: ion implantation, diffusion, or insitu doping.
Claim 44
Independent Claim
132 words
A method for forming a semiconductor device comprising the steps of: providing a substrate having a top surface; forming a vertically-oriented channel region wherein current flows through the vertically-oriented channel region perpendicular to the top surface of the substrate; forming a thermally grown oxide layer laterally adjacent the vertically-oriented channel region, the thermally grown oxide layer having micropores therethrough; forming a deposited dielectric layer laterally adjacent the thermally grown oxide layer wherein the deposited dielectric layer has micropores misaligned to the thermally grown oxide layer; exposing the deposited dielectric layer to a dopant species to dope one of either the thermally grown oxide layer or the deposited dielectric layer with a species selected from the group consisting of: nitrogen and fluorine; and forming a gate electrode laterally adjacent the deposited dielectric layer.
Claim 45
Independent Claim
132 words
A method for forming a semiconductor device comprising the steps of: providing a substrate having a top surface; forming a vertically-oriented channel region wherein current flows through the vertically-oriented channel region perpendicular to the top surface of the substrate; forming a thermally grown oxide layer laterally adjacent the vertically-oriented channel region, the thermally grown oxide layer having micropores therethrough; forming a deposited dielectric layer laterally adjacent the thermally grown oxide layer wherein the deposited dielectric layer has micropores misaligned to the thermally grown oxide layer; exposing the deposited dielectric layer to a dopant species to dope one of either the thermally grown oxide layer or the deposited dielectric layer with a species selected from the group consisting of: nitrogen and fluorine; and forming a gate electrode laterally adjacent the deposited dielectric layer.
Claim 46
Independent Claim
160 words
A method for forming a semiconductor device comprising the steps of: forming a plurality of source electrode diffusion regions with dopant atoms of a first conductivity type within a substrate, the plurality of source electrode diffusion regions being separated from each other by disconnection regions wherein the disconnection regions are doped with dopant atoms of an second conductivity type wherein the second conductivity type is opposite the first conductivity type; forming a gate electrode overlying the disconnection regions, the gate electrode being one gate electrode in a memory cell structure; selectively enabling the gate electrode to selectively couple together the plurality of source electrode diffusion regions in the plurality of source electrode diffusion regions via inversion regions formed within the disconnection regions, wherein the inversion regions are regions of the first conductivity type formed via enablement of the gate electrode; and transmitting an electrical voltage signal through all of the inversion regions and the plurality of source electrode diffusion regions.
Claim 47
Independent Claim
160 words
A method for forming a semiconductor device comprising the steps of: forming a plurality of source electrode diffusion regions with dopant atoms of a first conductivity type within a substrate, the plurality of source electrode diffusion regions being separated from each other by disconnection regions wherein the disconnection regions are doped with dopant atoms of an second conductivity type wherein the second conductivity type is opposite the first conductivity type; forming a gate electrode overlying the disconnection regions, the gate electrode being one gate electrode in a memory cell structure; selectively enabling the gate electrode to selectively couple together the plurality of source electrode diffusion regions in the plurality of source electrode diffusion regions via inversion regions formed within the disconnection regions, wherein the inversion regions are regions of the first conductivity type formed via enablement of the gate electrode; and transmitting an electrical voltage signal through all of the inversion regions and the plurality of source electrode diffusion regions.
Claim 48
Independent Claim
191 words
A method for forming a semiconductor device comprising the steps of: providing a silicon diffusion region which is made of a material capable of selective growth; growing a first current electrode vertically from the silicon diffusion region, the first current electrode being of a first conductivity type; growing a first channel region portion vertically from the first current electrode, the first channel region being of a second conductivity type which is opposite the first conductivity type; growing a second channel region portion vertically from the first channel region portion; forming a third current electrode coupled to the second channel region portion, the third current electrode being of the first conductivity type; forming a floating gate electrode laterally adjacent a first selected region selected from a group consisting of: the first channel region portion and the second channel region portion; forming a select gate electrode laterally adjacent a second selected region selected from a group consisting of: the first channel region portion and the second channel region portion, wherein the second selected region is different from the first selected region; and forming a control gate electrode laterally adjacent the floating gate electrode.
Claim 49
Independent Claim
191 words
A method for forming a semiconductor device comprising the steps of: providing a silicon diffusion region which is made of a material capable of selective growth; growing a first current electrode vertically from the silicon diffusion region, the first current electrode being of a first conductivity type; growing a first channel region portion vertically from the first current electrode, the first channel region being of a second conductivity type which is opposite the first conductivity type; growing a second channel region portion vertically from the first channel region portion; forming a third current electrode coupled to the second channel region portion, the third current electrode being of the first conductivity type; forming a floating gate electrode laterally adjacent a first selected region selected from a group consisting of: the first channel region portion and the second channel region portion; forming a select gate electrode laterally adjacent a second selected region selected from a group consisting of: the first channel region portion and the second channel region portion, wherein the second selected region is different from the first selected region; and forming a control gate electrode laterally adjacent the floating gate electrode.
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