← Back to Patent Explorer
US6337231B1 Expired / Lapsed US ⏱️ 0.0 years remaining

Method for producing semiconductor device

Assignee: Semiconductor Energy Laboratory Co Ltd
•
Filing: 2000-03-22
•
Granted: 2002-01-08
•
Expires: 2020-03-22
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A silicon film provided on a blocking film 102 on a substrate 101 is made amorphous by doping Si+, and in a heat-annealing process, crystallization is started in parallel to a substrate from an area 100 where nickel serving as a crystallization-promoting, catalyst is introduced.

Inventors

  • 👤 Hongyong Zhang
  • 👤 Yasuhiko Takemura
  • 👤 Toru Takayama

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-07 09:43
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/20; H10P14/38; H10P14/3802; H10P14/3808; H10P14/3814; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/031; H10D30/0312; H10D30/0314; H10D30/0321; H10D62/00; H10D62/40; H10D86/00; H10D86/01; H10D86/021; H10D86/0221; H10D86/0223; H10D86/0225; H10P14/29; H10P14/2901; H10P14/2922; H10P14/32; H10P14/3202; H10P14/3238; H10P14/3241; H10P14/3242; H10P14/3244; H10P14/3248; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; H10P14/3806; H10P14/3822; H10P14/3816

Claims Analysis

Total Claims: 30
Claim 1
Independent Claim 54 words
A method of fabricating a semiconductor device, said method comprising the steps of: forming an amorphous semiconductor film comprising silicon on an insulating surface; adding a metal element in contact with the amorphous semiconductor film through a sputtering method; crystallizing the amorphous semiconductor film using the metal element to form a crystalline semiconductor film.
Claim 2
Independent Claim 54 words
A method of fabricating a semiconductor device, said method comprising the steps of: forming an amorphous semiconductor film comprising silicon on an insulating surface; adding a metal element in contact with the amorphous semiconductor film through a sputtering method; crystallizing the amorphous semiconductor film using the metal element to form a crystalline semiconductor film.
Claim 3
Dependent Claim 26 words
A method according to claim 1 , wherein the metal element comprises at least one selected from the group consisting of Ni, Co, Pd and Pt.
Claim 4
Dependent Claim 31 words
A method according to claim 1 , the metal element is included in the semiconductor film at a concentration in a range of 1×10 15 to 5×10 19 cm −3 .
Claim 5
Independent Claim 54 words
A method of fabricating a semiconductor device, said method comprising the steps of: forming an amorphous semiconductor film comprising silicon on an insulating surface; adding a catalytic material in contact with the amorphous semiconductor film through a sputtering method; crystallizing the amorphous semiconductor film using the catalytic material to form a crystalline semiconductor film.
Claim 6
Independent Claim 54 words
A method of fabricating a semiconductor device, said method comprising the steps of: forming an amorphous semiconductor film comprising silicon on an insulating surface; adding a catalytic material in contact with the amorphous semiconductor film through a sputtering method; crystallizing the amorphous semiconductor film using the catalytic material to form a crystalline semiconductor film.
Claim 7
Dependent Claim 14 words
A method according to claim 4 , wherein the catalytic material comprises nickel silicide.
Claim 8
Dependent Claim 22 words
A method according to claim 4 , wherein the catalytic material has a thickness in a range of 5 to 200 Å.
Claim 9
Independent Claim 54 words
A method of fabricating a semiconductor device, said method comprising the steps of: forming an amorphous semiconductor film comprising silicon on an insulating surface; adding a metal silicide in contact with the amorphous semiconductor film through a sputtering method; crystallizing the amorphous semiconductor film using the metal silicide to form a crystalline semiconductor film.
Claim 10
Independent Claim 54 words
A method of fabricating a semiconductor device, said method comprising the steps of: forming an amorphous semiconductor film comprising silicon on an insulating surface; adding a metal silicide in contact with the amorphous semiconductor film through a sputtering method; crystallizing the amorphous semiconductor film using the metal silicide to form a crystalline semiconductor film.
Claim 11
Dependent Claim 14 words
A method according to claim 7 , wherein the metal silicide comprises nickel silicide.
Claim 12
Dependent Claim 22 words
A method according to claim 7 , wherein the metal silicide has a thickness in a range of 5 to 200 Å.
Claim 13
Independent Claim 90 words
A method of fabricating a semiconductor device including a thin film transistor, said method comprising the steps of: forming an amorphous semiconductor film comprising silicon on an insulating surface; adding a catalytic material in contact with the amorphous semiconductor film through a sputtering method; crystallizing the amorphous semiconductor film using the catalytic material to form a crystalline semiconductor film; forming a gate electrode adjacent to the crystalline semiconductor film with a gate insulating film therebetween; introducing an impurity into the crystalline semiconductor film to form a pair of impurity regions.
Claim 14
Independent Claim 90 words
A method of fabricating a semiconductor device including a thin film transistor, said method comprising the steps of: forming an amorphous semiconductor film comprising silicon on an insulating surface; adding a catalytic material in contact with the amorphous semiconductor film through a sputtering method; crystallizing the amorphous semiconductor film using the catalytic material to form a crystalline semiconductor film; forming a gate electrode adjacent to the crystalline semiconductor film with a gate insulating film therebetween; introducing an impurity into the crystalline semiconductor film to form a pair of impurity regions.
Claim 15
Dependent Claim 14 words
A method according to claim 10 , wherein the catalytic material comprises nickel silicide.
Claim 16
Dependent Claim 22 words
A method according to claim 10 , wherein the catalytic material has a thickness in a range of 5 to 200 Å.
Claim 17
Dependent Claim 26 words
A method according to claim 10 , wherein the catalytic material comprises at least one selected from the group consisting of Ni, Co, Pd and Pt.
Claim 18
Dependent Claim 31 words
A method according to claim 10 , the catalytic material is included in the semiconductor film at a concentration in a range of 1×10 15 to 5×10 19 cm −3 .
Claim 19
Independent Claim 120 words
A method of fabricating a semiconductor device including a CMOS structure having an n-channel thin film transistor and a p-channel thin film transistor, said method comprising the steps of: forming an amorphous semiconductor film comprising silicon on an insulating surface; adding a catalytic material in contact with the amorphous semiconductor film through a sputtering method; crystallizing the amorphous semiconductor film using the catalytic material to form a crystalline semiconductor film; forming a gate electrode adjacent to the crystalline semiconductor film with a gate insulating film therebetween; introducing an n-type impurity into the crystalline semiconductor film to form a pair of n-type impurity regions; introducing a p-type impurity into the crystalline semiconductor film to form a pair of p-type impurity regions.
Claim 20
Independent Claim 120 words
A method of fabricating a semiconductor device including a CMOS structure having an n-channel thin film transistor and a p-channel thin film transistor, said method comprising the steps of: forming an amorphous semiconductor film comprising silicon on an insulating surface; adding a catalytic material in contact with the amorphous semiconductor film through a sputtering method; crystallizing the amorphous semiconductor film using the catalytic material to form a crystalline semiconductor film; forming a gate electrode adjacent to the crystalline semiconductor film with a gate insulating film therebetween; introducing an n-type impurity into the crystalline semiconductor film to form a pair of n-type impurity regions; introducing a p-type impurity into the crystalline semiconductor film to form a pair of p-type impurity regions.
Claim 21
Dependent Claim 14 words
A method according to claim 15 , wherein the catalytic material comprises nickel silicide.
Claim 22
Dependent Claim 22 words
A method according to claim 15 , wherein the catalytic material has a thickness in a range of 5 to 200 Å.
Claim 23
Dependent Claim 26 words
A method according to claim 15 , wherein the catalytic material comprises at least one selected from the group consisting of Ni, Co, Pd and Pt.
Claim 24
Dependent Claim 31 words
A method according to claim 15 , the catalytic material is included in the semiconductor film at a concentration in a range of 1×10 15 to 5×10 19 cm −3 .
Claim 25
Dependent Claim 19 words
A method according to claim 15 , wherein the n-type impurity is phosphorus while the p-type impurity is boron.
Claim 26
Independent Claim 134 words
A method of fabricating an active matrix type display device including at least an n-type thin film transistor as a switching element, said method comprising the steps of: forming an amorphous semiconductor film comprising silicon on an insulating surface; adding a catalytic material in contact with the amorphous semiconductor film through a sputtering method; crystallizing the amorphous semiconductor film using the catalytic material to form a crystalline semiconductor film; forming a gate electrode adjacent to the crystalline semiconductor film with a gate insulating film therebetween; introducing an n-type impurity into the crystalline semiconductor film to form a source region and a drain region; forming an interlayer insulating film over the n-channel thin film transistor; forming a pixel electrode over the interlayer insulating film being electrically connected to one of the source and drain regions.
Claim 27
Independent Claim 134 words
A method of fabricating an active matrix type display device including at least an n-type thin film transistor as a switching element, said method comprising the steps of: forming an amorphous semiconductor film comprising silicon on an insulating surface; adding a catalytic material in contact with the amorphous semiconductor film through a sputtering method; crystallizing the amorphous semiconductor film using the catalytic material to form a crystalline semiconductor film; forming a gate electrode adjacent to the crystalline semiconductor film with a gate insulating film therebetween; introducing an n-type impurity into the crystalline semiconductor film to form a source region and a drain region; forming an interlayer insulating film over the n-channel thin film transistor; forming a pixel electrode over the interlayer insulating film being electrically connected to one of the source and drain regions.
Claim 28
Dependent Claim 14 words
A method according to claim 21 , wherein the catalytic material comprises nickel suicide.
Claim 29
Dependent Claim 22 words
A method according to claim 21 , wherein the catalytic material has a thickness in a range of 5 to 200 Å.
Claim 30
Dependent Claim 19 words
A method according to claim 21 , wherein the active matrix display device is a liquid crystal display device.

References Cited (Backward Citations)

US3692574A Cited
US3749614A Cited
JPS5327371A Cited
JPS5470762A Cited
US4309224A Cited
US4319395A Cited
US5262350A Cited
JPS57102067A Cited
US4406709A Cited
US4561171A Cited
US4466179A Cited
JPS59161870A Cited
JPS6055665A Cited
US5162892A Cited
US4727044A Cited
JPS6163017A Cited
JPS6184074A Cited
JPS62174973A Cited
US5296405A Cited
US4986213A Cited
US4772564A Cited
US5170244A Cited
US4757026A Cited
US4951601A Cited
JPS63170971A Cited
JPS63204769A Cited
US5010033A Cited
JPS63295065A Cited
US4904611A Cited
JPH01125866A Cited
US4897361A Cited
US4946799A Cited
JPH0298143A Cited
JPH02140915A Cited
JPH02159730A Cited
JPH02222546A Cited
JPH02237037A Cited
US5531182A Cited
US5075259A Cited
US5177578A Cited
US5278093A Cited
JPH03280420A Cited
US5147826A Cited
US5318661A Cited
US5145808A Cited
US5289030A Cited
JPH04305940A Cited
JPH04337626A Cited
US5288658A Cited
US5352291A Cited
US5352291B1 Cited
JPH0547791A Cited
US5545571A Cited
JPH0567635A Cited
US5326991A Cited
JPH05109737A Cited
US5278851A Cited
US5424244A Cited
US5563426A Cited
US5403772A Cited
US5604360A Cited
US5696386A Cited
US5608232A Cited
US5897347A Cited
US5639698A Cited
US5275851A Cited
US5569936A Cited
US5646424A Cited
US5614733A Cited
US5624851A Cited
US5569610A Cited
US5426064A Cited
US5580792A Cited
US5677549A Cited
US5595944A Cited
US5595923A Cited
US5589694A Cited
US5501989A Cited
US5481121A Cited
US5824573A Cited
US5818076A Cited
US5488000A Cited
US5663077A Cited
US5529937A Cited
US5589406A Cited
US5492843A Cited
US5614426A Cited
US5696388A Cited
US5508533A Cited
US5637515A Cited
US5534716A Cited
US5616506A Cited
US5643826A Cited
US5612250A Cited
US5543352A Cited
US5654203A Cited
US5439837A Cited
US5705829A Cited
US5605846A Cited
US5656825A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2005-01-07 2005-07-09 2006-01-08 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2009-01-07 2009-07-09 2010-01-08 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2013-01-07 2013-07-09 2014-01-08 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag