US5262350A
Expired / Lapsed
US
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Forming a non single crystal semiconductor layer by using an electric current
Assignee: Semiconductor Energy Laboratory Co Ltd
•
Filing: 1992-07-01
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Granted: 1993-11-16
•
Expires: 2012-07-01
Abstract
Abstract A semiconductor device which has a non-single crystal semiconductor layer formed on a substrate and in which the non-single crystal semiconductor layer is composed of a first semiconductor region formed primarily of non-single crystal semiconductor and a second semi-conductor region formed primarily of semi-amorphous semiconductor. The second semiconductor region has a higher degree of conductivity than the first semiconductor region so that a semi-conductor element may be formed.
Inventors
- 👤 Shunpei Yamazaki
- 👤 Yujiro Nagata
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 23:36
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/20; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; H10D; H10D30/00; H10D30/60; H10D30/67; H10D30/6729; H10D30/673; H10D30/6731; H10D30/674; H10D30/6741; H10D30/6743; H10D30/6746; H10D62/00; H10D62/40; H10D62/80; H10D62/83; H10D62/832; H10F; H10F19/00; H10F19/30; H10F19/31; H10F71/00; H10F71/10; H10F71/103; H10P14/24; H10P14/29; H10P14/2901; H10P14/2921; H10P14/2922; Y; Y02; Y02E; Y02E10/00; Y02E10/50; Y02P; Y02P70/00; Y02P70/50
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
89 words
A method of forming a semiconductor layer comprising the steps of: forming a semiconductor layer on a substrate; and applying an electric current to at least a portion of said semiconductor layer to modify said portion of the semiconductor layer to be a semi-amorphous semiconductor where said semi-amorphous semiconductor is a mixture of a non-crystalline structure and a microcrystalline structure of the semiconductor and has a lattice strain and said semi-amorphous semiconductor is doped with a dangling bond neutralizer comprising hydrogen or fluorine at less tha 5 mol %.
Claim 2
Independent Claim
89 words
A method of forming a semiconductor layer comprising the steps of: forming a semiconductor layer on a substrate; and applying an electric current to at least a portion of said semiconductor layer to modify said portion of the semiconductor layer to be a semi-amorphous semiconductor where said semi-amorphous semiconductor is a mixture of a non-crystalline structure and a microcrystalline structure of the semiconductor and has a lattice strain and said semi-amorphous semiconductor is doped with a dangling bond neutralizer comprising hydrogen or fluorine at less tha 5 mol %.
Claim 3
Dependent Claim
16 words
A method according to claim 1 wherein said semiconductor layer is substantially an intrinsic conductivity type.
Claim 4
Dependent Claim
26 words
A method according to claim 1 wherein the carrier length range of at least the minority carriers in the semi-amorphous semiconductor is at least one micron.
Claim 5
Dependent Claim
13 words
A method according to claim 1 wherein said substrate has an insulating surface.
Claim 6
Dependent Claim
37 words
A method according to claim 1 wherein said semiconductor comprises a material selected from the group consisting of Si, Ge, Si 3 N 4-x (0<x<4), SiO 2-x (0<x<2), SiC x (0<x<1), or Si x Ge 1-x (0<x<1).
Claim 7
Dependent Claim
19 words
A method according to claim 1 wherein said non-single crystal semiconductor layer is formed by glow dischage CVD method.
Claim 8
Dependent Claim
21 words
A method according to claim 1 wherein said semi-amorphous semiconductor layer is an active layer of insulated gate field effect transistor.
Claim 9
Dependent Claim
46 words
In a method of manufacturing a field effect transistor comprising source, drain and channel regions, the improvement comprising: forming a semiconductor layer; applying an electric current to said semiconductor layer to modify said layer to a semi-amorphous semiconductor layer, thereby forming at least said channel region.
Claim 10
Dependent Claim
46 words
In a method of manufacturing a field effect transistor comprising source, drain and channel regions, the improvement comprising: forming a semiconductor layer; applying an electric current to said semiconductor layer to modify said layer to a semi-amorphous semiconductor layer, thereby forming at least said channel region.
Claim 11
Dependent Claim
50 words
A method according to claim 8 wherein said semi-amorphous semiconductor is a mixture of a non-crystalline structure and a microcrystalline structure of the semiconductor and has a lattice strain, and said semi-amorphous semiconductor is doped with a dangling bond neutralizer comprising hydrogen or fluorine at less than 5 mol %.
Claim 12
Dependent Claim
37 words
A method according to claim 9 wherein said semiconductor comprises a material selected from the group consisting of Si, Ge, Si 3 N 4-x (0<x<4), SiO 2-x (0<x<2), SiC x (0<x<1), or Si x Ge 1-x (0<x<1).
Claim 13
Independent Claim
76 words
A method of manufacturing a field effect transistor comprising the steps of: manufacturing a field effect transistor comprising at least source, drain and channel semiconductor layers, a gate electrode adjacent to said channel semiconductor layer with an insulating layer therebetween, source and drain electrodes connected to said source and drain regions, respectively; and applying an electric current to at least to said channel semiconductor layer in order to modify said layer to a semi-amorphous semiconductor layer.
Claim 14
Independent Claim
76 words
A method of manufacturing a field effect transistor comprising the steps of: manufacturing a field effect transistor comprising at least source, drain and channel semiconductor layers, a gate electrode adjacent to said channel semiconductor layer with an insulating layer therebetween, source and drain electrodes connected to said source and drain regions, respectively; and applying an electric current to at least to said channel semiconductor layer in order to modify said layer to a semi-amorphous semiconductor layer.
Claim 15
Dependent Claim
50 words
A method according to claim 11 wherein said semi-amorphous semiconductor is a mixture of a non-crystalline structure and a microcrystalline structure of the semiconductor and has a lattice strain and said semi-amorphous semiconductor is doped with a dangling bond neutralizer comprising hydrogen or fluorine at less than 5 mol %.
Claim 16
Dependent Claim
37 words
A method according to claim 11 wherein said semiconductor comprises a material selected from the group consisting of Si, Ge, Si 3 N 4-x (0<x<4), SiO 2-x (0<x<2), SiC x (0<x<1), or Si x Ge 1-x (0<x<1).
Claim 17
Dependent Claim
24 words
A method according to claim 11 wherein said electric current is externally applied to said channel semiconductor layer through said source and drain electrodes.
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