Manufacture of semiconductor integrated circuit

Abstract

Abstract PURPOSE:To reduce the number of processes in the manufacture of a semiconductor integrated circuit by a method wherein the thickness of a gate insulating film on the upper parts of regions, in which low-impurity concentration diffused layers are respectively formed, is made thick compared with the thickness of a gate insulating film on the upper parts of regions, in which high-impurity concentration diffused layers are respectively formed, and an ion implantation is performed using these gate insulating films and a gate electrode as masks. CONSTITUTION:A gate oxide film 2 is formed on the whole surface of a P-type Si substrate 1 and gate oxide films 21 and 22 having either of two kinds of film thicknesses are formed by selectively etching and a heat treatment in dry oxygen. At this time, in a high-withstand voltage MOS field-effect transistor (a FET), the thickness of the film 22 on regions, in which low-impurity concentration diffused layers are respectively formed, is set in 2000Angstrom and the thickness of the film 21 on regions, in which high-impurity concentration diffused layers are respectively formed, is set in 400Angstrom and moreover, in a high-speed and high-integration MOS FET, the film 21 of a film thickness of 400Angstrom is formed. Then, a gate electrode 3 is formed of a polycrystalline silicon film and an ion implantation of phosphorus 4 is performed in a self-alignment manner using this electrode 3 as a mask. Thereby, a high-withstand voltage MIS FET and source and drain parts of a high-speed and high integration MIS FET, for example, can be simultaneously formed by a single ion implantation process.

Inventors

• 👤 Yasuo Sato
• 👤 康夫 佐藤

Bibliographic Details