US8569156B1
Active / In Force
US
⏱️ 5.5 years remaining
Reducing or eliminating pre-amorphization in transistor manufacture
Assignee: United Semiconductor Japan Co Ltd
•
Filing: 2012-05-16
•
Granted: 2013-10-29
•
Expires: 2032-05-16
Abstract
Abstract A method for fabricating field effect transistors using carbon doped silicon layers to substantially reduce the diffusion of a doped screen layer formed below a substantially undoped channel layer includes forming an in-situ epitaxial carbon doped silicon substrate that is doped to form the screen layer in the carbon doped silicon substrate and forming the substantially undoped silicon layer above the carbon doped silicon substrate. The method may include implanting carbon below the screen layer and forming a thin layer of in-situ epitaxial carbon doped silicon above the screen layer. The screen layer may be formed either in a silicon substrate layer or the carbon doped silicon substrate.
Inventors
- 👤 Lance Scudder
- 👤 Pushkar Ranade
- 👤 Charles Stager
- 👤 Urupattur C. Sridharan
- 👤 Dalong Zhao
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 11:40
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H10D84/02; H10D84/03; H10D84/038; H10D12/00; H10D12/01; H10D12/031; H10D30/00; H10D30/01; H10D30/021; H10D30/0217; H10D30/0223; H10D30/0227; H10D62/00; H10D62/10; H10D62/17; H10D62/213; H10D62/221; H10D62/235; H10D62/314; H10D62/351; H10D62/357; H10D62/364; H10D62/371; H10D62/80; H10D62/83; H10D62/832; H10D62/8325; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/0188; H10D84/0191; H10D84/035; H10D84/80; H10D84/82; H10D84/83; H10D84/85; H10D84/854; H10P; H10P14/00; H10P14/20; H10P14/38; H10P14/3822; H10P30/00; H10P30/20; H10P30/202; H10P30/204; H10P30/2042; H10P30/208; H10P30/21; H10P30/218; H10D30/027; H10D30/0278; H10D30/60; H10D30/601
Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
107 words
A method for forming a NMOS field effect transistor (FET) in a doped well of a substrate, the NMOS FET having a source and a drain, comprising the steps of: forming an in-situ epitaxial carbon doped silicon layer in the doped well; implanting dopants to form an NMOS anti-punchthrough layer positioned below the carbon doped silicon layer; implanting dopants in the carbon doped silicon layer to form an NMOS screen layer, the NMOS screen layer being positioned laterally between eventual positions of the source and the drain; annealing using a low thermal budget anneal; and depositing substantially undoped epitaxial silicon layer on the carbon doped silicon layer.
Claim 2
Independent Claim
107 words
A method for forming a NMOS field effect transistor (FET) in a doped well of a substrate, the NMOS FET having a source and a drain, comprising the steps of: forming an in-situ epitaxial carbon doped silicon layer in the doped well; implanting dopants to form an NMOS anti-punchthrough layer positioned below the carbon doped silicon layer; implanting dopants in the carbon doped silicon layer to form an NMOS screen layer, the NMOS screen layer being positioned laterally between eventual positions of the source and the drain; annealing using a low thermal budget anneal; and depositing substantially undoped epitaxial silicon layer on the carbon doped silicon layer.
Claim 3
Dependent Claim
33 words
The method of claim 1 , wherein the first layer of in-situ epitaxial carbon doped silicon layer is operable to substantially limit diffusion of the NMOS screen layer dopants without using pre-amorphization implants.
Claim 4
Dependent Claim
27 words
The method of claim 1 , further comprising forming a threshold voltage set layer positioned between the NMOS screen layer and the substantially undoped epitaxial silicon layer.
Claim 5
Dependent Claim
25 words
The method of claim 1 , wherein depositing the in-situ epitaxial layer of carbon doped silicon comprises depositing a blanket epitaxial carbon doped silicon layer.
Claim 6
Dependent Claim
21 words
The method of claim 1 , wherein depositing the substantially undoped epitaxial silicon layer comprises depositing a blanket epitaxial silicon layer.
Claim 7
Dependent Claim
30 words
The method of claim 1 , further comprising depositing a second in-situ epitaxial carbon doped silicon layer above the NMOS screen layer before depositing the substantially undoped epitaxial silicon layer.
Claim 8
Dependent Claim
20 words
The method of claim 6 , further comprising implanting carbon between the NMOS screen layer and the NMOS anti-punchthrough layer.
Claim 9
Dependent Claim
20 words
The method of claim 1 , further comprising implanting carbon between the NMOS screen layer and the NMOS anti-punchthrough layer.
Claim 10
Independent Claim
85 words
A method for forming a NMOS FET in a doped well of a substrate, further comprising: implanting dopants to form a NMOS anti-punchthrough layer; implanting dopants to form a NMOS screen layer; depositing an in-situ epitaxial carbon doped silicon layer above the NMOS screen layer; annealing using low thermal budget anneal; and depositing a substantially undoped epitaxial silicon layer on the substrate; wherein the in-situ carbon doped silicon layer is operable to substantially limit diffusion of the NMOS screen layer dopants without using pre-amorphization implants.
Claim 11
Independent Claim
85 words
A method for forming a NMOS FET in a doped well of a substrate, further comprising: implanting dopants to form a NMOS anti-punchthrough layer; implanting dopants to form a NMOS screen layer; depositing an in-situ epitaxial carbon doped silicon layer above the NMOS screen layer; annealing using low thermal budget anneal; and depositing a substantially undoped epitaxial silicon layer on the substrate; wherein the in-situ carbon doped silicon layer is operable to substantially limit diffusion of the NMOS screen layer dopants without using pre-amorphization implants.
Claim 12
Dependent Claim
20 words
The method of claim 9 , wherein the in-situ carbon doped silicon layer has a thickness of approximately 5 nanometers.
Claim 13
Dependent Claim
20 words
The method of claim 9 , further comprising implanting carbon between the NMOS screen layer and the NMOS anti-punchthrough layer.
Claim 14
Dependent Claim
25 words
The method of claim 9 , further comprising forming a threshold voltage set layer positioned between the NMOS screen layer and the intrinsic epitaxial layer.
Claim 15
Dependent Claim
25 words
The method of claim 9 , wherein depositing the layer of in-situ carbon doped silicon layer comprises depositing a blanket epitaxial carbon doped silicon layer.
Claim 16
Dependent Claim
23 words
The method of claim 9 , wherein depositing the substantially undoped epitaxial silicon layer comprises depositing a substantially undoped blanket epitaxial silicon layer.
Claim 17
Independent Claim
228 words
A method for forming an integrated circuit device in a substrate, comprising: forming a PMOS field effect transistor (FET) in a first doped well of the substrate, the PMOS FET having a source and a drain, forming the PMOS FET further comprising: implanting dopants in the first doped well to form a PMOS anti-punchthrough layer; and implanting dopants in the first doped well to form a PMOS screen layer above the PMOS anti-punchthrough layer, the PMOS screen layer being positioned laterally between eventual positions of the source and the drain; and forming a NMOS field effect transistor (FET) in a second doped well of the substrate, the NMOS FET having a source and a drain, forming the NMOS FET further comprising: implanting dopants in the first doped well to form a NMOS anti-punchthrough layer; forming an in-situ epitaxial carbon doped silicon layer positioned above the NMOS anti-punchthrough layer, the carbon doped silicon layer being formed as a selective epitaxial layer; and implanting dopants in the carbon doped silicon layer to form a NMOS screen layer, the NMOS screen layer being positioned laterally between eventual positions of the source and the drain; and annealing using a low thermal budget anneal; and forming a substantially undoped epitaxial silicon layer over the PMOS screen layer and the NMOS screen layer, the epitaxial silicon layer being formed as a blanket epitaxial layer.
Claim 18
Independent Claim
228 words
A method for forming an integrated circuit device in a substrate, comprising: forming a PMOS field effect transistor (FET) in a first doped well of the substrate, the PMOS FET having a source and a drain, forming the PMOS FET further comprising: implanting dopants in the first doped well to form a PMOS anti-punchthrough layer; and implanting dopants in the first doped well to form a PMOS screen layer above the PMOS anti-punchthrough layer, the PMOS screen layer being positioned laterally between eventual positions of the source and the drain; and forming a NMOS field effect transistor (FET) in a second doped well of the substrate, the NMOS FET having a source and a drain, forming the NMOS FET further comprising: implanting dopants in the first doped well to form a NMOS anti-punchthrough layer; forming an in-situ epitaxial carbon doped silicon layer positioned above the NMOS anti-punchthrough layer, the carbon doped silicon layer being formed as a selective epitaxial layer; and implanting dopants in the carbon doped silicon layer to form a NMOS screen layer, the NMOS screen layer being positioned laterally between eventual positions of the source and the drain; and annealing using a low thermal budget anneal; and forming a substantially undoped epitaxial silicon layer over the PMOS screen layer and the NMOS screen layer, the epitaxial silicon layer being formed as a blanket epitaxial layer.
Claim 19
Dependent Claim
25 words
The method of claim 15 , further comprising performing pre-amorphization implants for the PMOS FETs to substantially limit diffusion of the PMOS screen layer dopants.
Claim 20
Independent Claim
280 words
A method for forming an integrated circuit device in a substrate, comprising: forming a PMOS field effect transistor (FET) in a first doped well of the substrate, the PMOS FET having a source and a drain, forming the PMOS FET further comprising: implanting dopants in the first doped well to form a PMOS anti-punchthrough layer; and implanting dopants in the first doped well to form a PMOS screen layer above the PMOS anti-punchthrough layer, the PMOS screen layer being positioned laterally between eventual positions of the source and the drain; and forming a NMOS field effect transistor (FET) in a second doped well of the substrate, the NMOS FET having a source and a drain, forming the NMOS FET further comprising: implanting dopants in the first doped well to form a NMOS anti-punchthrough layer; forming a first layer of carbon doped silicon positioned above the NMOS anti-punchthrough layer, the carbon doped silicon layer being formed as a selective epitaxial layer; forming a second layer of silicon doped with carbon and NMOS screen layer dopants positioned above the first layer, the second layer being formed as a selective epitaxial layer; and forming a third layer of carbon doped silicon positioned above the second layer, the third layer being formed as a selective epitaxial layer; implanting dopants in the carbon doped silicon layer to form a NMOS screen layer, the NMOS screen layer being positioned laterally between eventual positions of the source and the drain; and annealing using a low thermal budget anneal; and forming a substantially undoped epitaxial silicon layer over the PMOS screen layer and the NMOS screen layer, the epitaxial silicon layer being formed as a blanket epitaxial layer.
Claim 21
Independent Claim
280 words
A method for forming an integrated circuit device in a substrate, comprising: forming a PMOS field effect transistor (FET) in a first doped well of the substrate, the PMOS FET having a source and a drain, forming the PMOS FET further comprising: implanting dopants in the first doped well to form a PMOS anti-punchthrough layer; and implanting dopants in the first doped well to form a PMOS screen layer above the PMOS anti-punchthrough layer, the PMOS screen layer being positioned laterally between eventual positions of the source and the drain; and forming a NMOS field effect transistor (FET) in a second doped well of the substrate, the NMOS FET having a source and a drain, forming the NMOS FET further comprising: implanting dopants in the first doped well to form a NMOS anti-punchthrough layer; forming a first layer of carbon doped silicon positioned above the NMOS anti-punchthrough layer, the carbon doped silicon layer being formed as a selective epitaxial layer; forming a second layer of silicon doped with carbon and NMOS screen layer dopants positioned above the first layer, the second layer being formed as a selective epitaxial layer; and forming a third layer of carbon doped silicon positioned above the second layer, the third layer being formed as a selective epitaxial layer; implanting dopants in the carbon doped silicon layer to form a NMOS screen layer, the NMOS screen layer being positioned laterally between eventual positions of the source and the drain; and annealing using a low thermal budget anneal; and forming a substantially undoped epitaxial silicon layer over the PMOS screen layer and the NMOS screen layer, the epitaxial silicon layer being formed as a blanket epitaxial layer.
Claim 22
Independent Claim
203 words
A method for forming an integrated circuit device in a substrate, comprising: forming a PMOS field effect transistor (FET) in a first doped well of the substrate, the PMOS FET having a source and a drain, forming the PMOS FET further comprising: implanting dopants in the first doped well to form a PMOS anti-punchthrough layer; and implanting dopants in the first doped well to form a PMOS screen layer above the PMOS anti-punchthrough layer, the PMOS screen layer being positioned laterally between eventual positions of the source and the drain; and forming a NMOS field effect transistor (FET) in a second doped well of the substrate, the NMOS FET having a source and a drain, forming the NMOS FET further comprising: implanting dopants in the first doped well to form a NMOS anti-punchthrough layer; and forming an in-situ epitaxial silicon layer doped with carbon and NMOS screen layer dopants positioned above the NMOS anti-punchthrough layer, the doped silicon layer being formed as a selective epitaxial layer; and annealing using a low thermal budget anneal; and forming a substantially undoped epitaxial silicon layer over the PMOS screen layer and the NMOS screen layer, the epitaxial silicon layer being formed as a blanket epitaxial layer.
Claim 23
Independent Claim
203 words
A method for forming an integrated circuit device in a substrate, comprising: forming a PMOS field effect transistor (FET) in a first doped well of the substrate, the PMOS FET having a source and a drain, forming the PMOS FET further comprising: implanting dopants in the first doped well to form a PMOS anti-punchthrough layer; and implanting dopants in the first doped well to form a PMOS screen layer above the PMOS anti-punchthrough layer, the PMOS screen layer being positioned laterally between eventual positions of the source and the drain; and forming a NMOS field effect transistor (FET) in a second doped well of the substrate, the NMOS FET having a source and a drain, forming the NMOS FET further comprising: implanting dopants in the first doped well to form a NMOS anti-punchthrough layer; and forming an in-situ epitaxial silicon layer doped with carbon and NMOS screen layer dopants positioned above the NMOS anti-punchthrough layer, the doped silicon layer being formed as a selective epitaxial layer; and annealing using a low thermal budget anneal; and forming a substantially undoped epitaxial silicon layer over the PMOS screen layer and the NMOS screen layer, the epitaxial silicon layer being formed as a blanket epitaxial layer.
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