US4000504A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Deep channel MOS transistor
Assignee: HP Inc
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Filing: 1975-05-12
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Granted: 1976-12-28
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Expires: 1995-05-12
Abstract
Abstract A semiconductor charge storage and detection device is provided in which an ion implanted conductive channel is buried between source and drain regions in the bulk of a semiconductor substrate. A charge storage region extends between the channel and the surface of the semiconductor device. The charge storage region is isolated from the semiconductor substrate and may be depleted of charge or enabled to store charge depending upon the electrical potential applied to a gate electrode at the surface of the device. The amount of charge stored may be detected by sensing the conductance of the buried channel. The device may be variously configured, e.g. as a non-destructive readable photosensor or as a memory cell.
Inventors
- 👤 Josef Berger
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 05:09
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/637
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
125 words
A semiconductor device comprising: a semiconductor substrate of a first conductivity type; a semiconductor source region of a second conductivity type in the substrate; a semiconductor drain region of said second conductivity type in the substrate; a semiconductor channel region of said second conductivity type in the substrate, the channel region interconnecting the source and drain regions; an insulating region on the substrate; a gate electrode on the insulating region; and a semiconductor charge storage region of said first conductivity type positioned between the channel region and the insulating region in the substrate beneath the electrode, and being completely separated from the remainder of the substrate by the channel region and portions of at least one of the source region, drain region, and insulating region.
Claim 2
Dependent Claim
125 words
A semiconductor device comprising: a semiconductor substrate of a first conductivity type; a semiconductor source region of a second conductivity type in the substrate; a semiconductor drain region of said second conductivity type in the substrate; a semiconductor channel region of said second conductivity type in the substrate, the channel region interconnecting the source and drain regions; an insulating region on the substrate; a gate electrode on the insulating region; and a semiconductor charge storage region of said first conductivity type positioned between the channel region and the insulating region in the substrate beneath the electrode, and being completely separated from the remainder of the substrate by the channel region and portions of at least one of the source region, drain region, and insulating region.
Claim 3
Dependent Claim
52 words
A semiconductor device as in claim 1 wherein said charge storage region includes a concentration of ions of said first conductivity type which allows substantial depletion of said storage region by the first voltage applied to said gate electrode, the charge storage region being thereby enabled to accumulate and store charge carriers.
Claim 4
Dependent Claim
64 words
A semiconductor device as in claim 2 wherein the charge storage region and the channel region include concentrations of ions of said first conductivity type and said second conductivity type respectively which allow depletion of majority charge carriers from the channel region when the first voltage is applied to the gate electrode, thereby rendering the channel region nonconductive between the source and drain regions.
Claim 5
Dependent Claim
69 words
A semiconductor device as in claim 3 wherein said charge storage region and the channel region include concentrations of ions of said first conductivity type and said second conductivity type respectively, which allow injection into the substrate of the charge stored in the storage region when a second voltage and of a magnitude less than the electrical breakdown voltage of the insulating region is applied to the gate electrode.
Claim 6
Dependent Claim
18 words
A semiconductor device as in claim 1 wherein the channel region is an ion-implanted region in the substrate.
Claim 7
Dependent Claim
33 words
A semiconductor device as in claim 1 wherein the gate electrode is of an optically semi-transparent material for allowing optical radiation to impinge on the charge storage region to generate charge carriers therein.
References Cited (Backward Citations)
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US3906296A
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1979-12-28 | 1980-06-28 | 1980-12-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1983-12-28 | 1984-06-28 | 1984-12-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1987-12-28 | 1988-06-28 | 1988-12-28 | $7700.00 | Window Closed / Lapsed |