US3814992A
Expired / Lapsed
US
⏱️ 0.0 years remaining
High performance fet
Assignee: International Business Machines Corp
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Filing: 1972-06-22
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Granted: 1974-06-04
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Expires: 1992-06-22
Abstract
Abstract A field effect transistor having improved mobility and including an impurity doped surface channel portion containing a controlled amount of impurity opposite to that in the substrate. The devices of the invention are characterized by the provision of a metallurgical junction formed within the normal maximum depletion depth from the insulator-semiconductor interface of a field effect transistor. The built-in electric field, or space charge region, of the junction extends to the interface providing an enhancement mode device. The preferred embodiment includes a step-junction although structures having graded junctions are also disclosed.
Inventors
- 👤 H Kump
- 👤 L Lambert
- 👤 R Quinn
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 21:44
CPC Classifications
H; H10; H10D; H10D99/00; H10D48/00; H10D48/30; H10D48/32; H10D48/36; H10P; H10P95/00
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
178 words
A semiconductor device comprising: a monocrystalline first conductivity type semiconductor bulk region having a first surface; spaced monocrystalline opposite conductivity type semiconductor source and drain regions located adjacent to said first surface, the portion of said first surface between said source and drain regions defining a channel region; field applying gate means overlying said channel region and being separated therefrom by an insulating material, said gate means controlling the conductIvity of said channel region; and metallurgical junction means in said channel region extending substantially parallel to said first surface for providing a built-in electric field, at zero junction bias, extending from the interface between said channel region and said insulating material to a depth less than the maximum depletion depth capable of being created by said field applying gate means, said field decreasing in magnitude toward said interface and being non-zero at said interface, said electric field providing a deficiency of minority carriers with respect to said bulk region in said channel region and causing said device to exhibit minimum source to drain conductance under zero gate bias.
Claim 2
Dependent Claim
178 words
A semiconductor device comprising: a monocrystalline first conductivity type semiconductor bulk region having a first surface; spaced monocrystalline opposite conductivity type semiconductor source and drain regions located adjacent to said first surface, the portion of said first surface between said source and drain regions defining a channel region; field applying gate means overlying said channel region and being separated therefrom by an insulating material, said gate means controlling the conductIvity of said channel region; and metallurgical junction means in said channel region extending substantially parallel to said first surface for providing a built-in electric field, at zero junction bias, extending from the interface between said channel region and said insulating material to a depth less than the maximum depletion depth capable of being created by said field applying gate means, said field decreasing in magnitude toward said interface and being non-zero at said interface, said electric field providing a deficiency of minority carriers with respect to said bulk region in said channel region and causing said device to exhibit minimum source to drain conductance under zero gate bias.
Claim 3
Dependent Claim
64 words
A semiconductor device of claim 1 wherein said bulk region comprises a semiconductor material having a impurity concentration of between 1 X 1014 and 1 X 1019 atoms per cubic centimeter and the surface of said channel region comprises a semiconductor material providing a surface area concentration of between 1 X 109 and 1 X 1013 excess opposite type impurity atoms per centimeter squared.
Claim 4
Dependent Claim
30 words
The semiconductor device of claim 1 wherein the maximum magnitude of said built-in electric field is at a depth of from 100 to 1,000 angstrom units from said first surface.
Claim 5
Dependent Claim
20 words
The semiconductor device of claim 1 wherein the impurity atom concentrations of said bulk and channel regions are substantially equal.
Claim 6
Dependent Claim
15 words
The semiconductor device of claim 1 wherein said metallurgical junction means comprises substantially a step-junction.
Claim 7
Dependent Claim
14 words
The semiconductor device of claim 1 wherein said bulk region is p-type conductivity silicon.
Claim 8
Dependent Claim
13 words
The semiconductor device of claim 6 wherein said channel comprises arsenic doped silicon.
Claim 9
Dependent Claim
17 words
The semiconductor device of claim 1 wherein said channel region comprises ion implanted impurity atoms in silicon.
Claim 10
Dependent Claim
25 words
The semiconductor device of claim 8 wherein said bulk region is p-type conductivity silicon and said channel region comprises ion implanted arsenic atoms in silicon.
Claim 11
Dependent Claim
43 words
The semiconductor device of claim 1 wherein the relationship between the bulk region doping density, Nb, in atoms per cubic centimeter, and the excess surface area density, Ns, in atoms per centimeter squared is, at 300K: log Ns 2.7 + 0.52 log Nb.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-06-03 | 1977-12-03 | 1978-06-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-06-03 | 1981-12-03 | 1982-06-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-06-03 | 1985-12-03 | 1986-06-04 | $7700.00 | Window Closed / Lapsed |