US7962867B2
Active / In Force
US
⏱️ 1.2 years remaining
Electronic design for integrated circuits based on process related variations
Assignee: Cadence Design Systems Inc
•
Filing: 2008-01-28
•
Granted: 2011-06-14
•
Expires: 2028-01-28
Abstract
Abstract An electronic design is generated for an integrated circuit that is to be fabricated in accordance with the electronic design by a process that will impart topographically induced feature dimension variations to the integrated circuit. The generating includes adjusting the electronic design based on predictions of topographical and topographical-related feature dimension variations by a pattern-dependent model. An RC extraction tool is used in conjunction with the generating and adjusting of the electronic design. The process includes a fabrication process that will impart topographical variation to the integrated circuit and a lithography or etch process. Placement attributes for elements of the integrated circuit are determined.
Inventors
- 👤 David White
- 👤 Taber H. Smith
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 22:30
CPC Classifications
G; G06; G06F; G06F30/00; G06F30/30; G06F30/39; H; H10; H10P; H10P52/00; H10P52/40; H10P52/403; H10P95/00; H10P95/06; H10P95/062
Claims Analysis
Total Claims: 25
Claim 1
Independent Claim
210 words
A computer-implemented method for predicting a characteristic of an integrated circuit, comprising: using at least one processor that is programmed for performing a process, the process comprising: using a pattern-dependent model of a fabrication process to predict a variation of a characteristic of an integrated circuit that is to be fabricated in accordance with a design by the fabrication process, wherein the variation is predicted based at least in part upon an analysis of an interaction between the fabrication process and a second fabrication process for the integrated circuit, and the fabrication process and the second fabrication process for the integrated circuit are both used to fabricate the integrated circuit; and determining a placement attribute and a routing attribute for an element of the integrated circuit based at least in part on the variation of the characteristic that is predicted to improve performance or manufacturing of the integrated circuit, wherein the element comprises one or more buffer regions for one or more components in the pattern dependent model, the element comprises one or more dummy fills or one or more slotting structures for the design of the integrated circuit, and the action of determining the placement attribute and the routing attribute comprises determining whether the variation exceeds a focus limit.
Claim 2
Dependent Claim
210 words
A computer-implemented method for predicting a characteristic of an integrated circuit, comprising: using at least one processor that is programmed for performing a process, the process comprising: using a pattern-dependent model of a fabrication process to predict a variation of a characteristic of an integrated circuit that is to be fabricated in accordance with a design by the fabrication process, wherein the variation is predicted based at least in part upon an analysis of an interaction between the fabrication process and a second fabrication process for the integrated circuit, and the fabrication process and the second fabrication process for the integrated circuit are both used to fabricate the integrated circuit; and determining a placement attribute and a routing attribute for an element of the integrated circuit based at least in part on the variation of the characteristic that is predicted to improve performance or manufacturing of the integrated circuit, wherein the element comprises one or more buffer regions for one or more components in the pattern dependent model, the element comprises one or more dummy fills or one or more slotting structures for the design of the integrated circuit, and the action of determining the placement attribute and the routing attribute comprises determining whether the variation exceeds a focus limit.
Claim 3
Dependent Claim
38 words
The method of claim 1 , in which the placement or the routing attribute comprises one or more attributes of buffer regions for interconnect vias and lines determined during a placement or a routing step in the design.
Claim 4
Dependent Claim
37 words
The method of claim 1 , in which the characteristic predicted comprises a width variation or a topographical variation, and the placement or the routing attribute comprises a placement location of an electrically active feature or component.
Claim 5
Dependent Claim
37 words
The method of claim 1 , in which the characteristic predicted comprises a width variation or a geographical variation, and the placement or the routing attribute comprises a routing of an interconnect feature across the integrated circuit.
Claim 6
Dependent Claim
21 words
The method of claim 1 , in which the characteristic predicted comprises placement of a dummy fill or a slotting structure.
Claim 7
Dependent Claim
22 words
The method of claim 1 , in which the characteristic predicted comprises a geometry of a dummy fill or a slotting structure.
Claim 8
Dependent Claim
57 words
The computer-implemented method of claim 1 , wherein the analysis of the interaction between the fabrication process and the second fabrication process for the integrated circuit comprises an electrical impact analysis that is used by the act of using the pattern-dependent model of the fabrication process to predict the variation of the characteristic of the integrated circuit.
Claim 9
Dependent Claim
53 words
The computer-implemented method of claim 1 , wherein the fabrication process or the second fabrication process comprises a high-density plasma process, a planarization process, a patterning process, an electroplated copper deposition, a dielectric film generation process, a material removal process, or a photoresist generation or removal process for fabrication of the integrated circuit.
Claim 10
Independent Claim
205 words
A system for predicting a characteristic of an integrated circuit, comprising: at least one processor that is programmed for performing a process, the process comprising: using a pattern-dependent model of a fabrication process to predict a variation of a characteristic of an integrated circuit that is to be fabricated in accordance with a design by the fabrication process, wherein the variation is predicted based at least in part upon an analysis of an interaction between the fabrication process and a second fabrication process for the integrated circuit, and the fabrication process and the second fabrication process for the integrated circuit are both used to fabricate the integrated circuit; and determining a placement attribute and a routing attribute for an element of the integrated circuit based at least in part on the characteristic that is predicted to improve performance or manufacturing of the integrated circuit, wherein the element comprises one or more buffer regions for one or more components in the pattern dependent model, the element comprises one or more dummy fills or one or more slotting structures for the design of the integrated circuit, and the action of determining the placement attribute and the routing attribute comprises determining whether the variation exceeds a focus limit.
Claim 11
Independent Claim
205 words
A system for predicting a characteristic of an integrated circuit, comprising: at least one processor that is programmed for performing a process, the process comprising: using a pattern-dependent model of a fabrication process to predict a variation of a characteristic of an integrated circuit that is to be fabricated in accordance with a design by the fabrication process, wherein the variation is predicted based at least in part upon an analysis of an interaction between the fabrication process and a second fabrication process for the integrated circuit, and the fabrication process and the second fabrication process for the integrated circuit are both used to fabricate the integrated circuit; and determining a placement attribute and a routing attribute for an element of the integrated circuit based at least in part on the characteristic that is predicted to improve performance or manufacturing of the integrated circuit, wherein the element comprises one or more buffer regions for one or more components in the pattern dependent model, the element comprises one or more dummy fills or one or more slotting structures for the design of the integrated circuit, and the action of determining the placement attribute and the routing attribute comprises determining whether the variation exceeds a focus limit.
Claim 12
Dependent Claim
37 words
The system of claim 9 , in which the placement or the routing attribute comprises one or more attributes of buffer regions for interconnect vias and lines determined during a place and route step in the design.
Claim 13
Dependent Claim
37 words
The system of claim 9 , in which the characteristic predicted comprises a width variation or a topographical variation, and the placement or the routing attribute comprises a placement location of an electrically active feature or component.
Claim 14
Dependent Claim
37 words
The system of claim 9 , in which the characteristic predicted comprises a width variation or a geographical variation, and the placement or the routing attribute comprises a routing of an interconnect feature across the integrated circuit.
Claim 15
Dependent Claim
20 words
The system of claim 9 , in which the characteristic predicted comprises placement of a dummy or a slotting structure.
Claim 16
Dependent Claim
21 words
The system of claim 9 , in which the characteristic predicted comprises a geometry of a dummy or a slotting structure.
Claim 17
Dependent Claim
56 words
The system of claim 9 , wherein the analysis of the interaction between the fabrication process and the second fabrication process for the integrated circuit comprises an electrical impact analysis that is used by the act of using the pattern-dependent model of the fabrication process to predict the variation of the characteristic of the integrated circuit.
Claim 18
Dependent Claim
242 words
A computer program product comprising a non-transitory tangible computer-usable storage medium having executable code which, when executed by at least one processor, causes the at least one processor to execute a method for predicting a characteristic of an integrated circuit, the method comprising: using the at least one processor that is programmed for performing a process, the process comprising: using a pattern-dependent model of a fabrication process to predict a variation of a characteristic of an integrated circuit that is to be fabricated in accordance with a design by the fabrication process, wherein the variation is predicted based at least in part upon an analysis of an interaction between the fabrication process and a second fabrication process for the integrated circuit, and the fabrication process and the second fabrication process for the integrated circuit are both used to fabricate the integrated circuit; and determining a placement attribute and a routing attribute for an element of the integrated circuit based at least in part on the variation of the characteristic that is predicted to improve performance or manufacturing of the integrated circuit, wherein the element comprises one or more buffer regions for one or more components in the pattern dependent model, the element comprises one or more dummy fills or one or more slotting structures for the design of the integrated circuit, and the action of determining the placement attribute and the routing attribute comprises determining whether the variation exceeds a focus limit.
Claim 19
Dependent Claim
242 words
A computer program product comprising a non-transitory tangible computer-usable storage medium having executable code which, when executed by at least one processor, causes the at least one processor to execute a method for predicting a characteristic of an integrated circuit, the method comprising: using the at least one processor that is programmed for performing a process, the process comprising: using a pattern-dependent model of a fabrication process to predict a variation of a characteristic of an integrated circuit that is to be fabricated in accordance with a design by the fabrication process, wherein the variation is predicted based at least in part upon an analysis of an interaction between the fabrication process and a second fabrication process for the integrated circuit, and the fabrication process and the second fabrication process for the integrated circuit are both used to fabricate the integrated circuit; and determining a placement attribute and a routing attribute for an element of the integrated circuit based at least in part on the variation of the characteristic that is predicted to improve performance or manufacturing of the integrated circuit, wherein the element comprises one or more buffer regions for one or more components in the pattern dependent model, the element comprises one or more dummy fills or one or more slotting structures for the design of the integrated circuit, and the action of determining the placement attribute and the routing attribute comprises determining whether the variation exceeds a focus limit.
Claim 20
Dependent Claim
39 words
The computer program product of claim 16 , in which the placement or the routing attribute comprises one or more attributes of buffer regions for interconnect vias and lines determined during a place and route step in the design.
Claim 21
Dependent Claim
39 words
The computer program product of claim 16 , in which the characteristic predicted comprises a width variation or a topographical variation, and the placement or the routing attribute comprises a placement location of an electrically active feature or component.
Claim 22
Dependent Claim
39 words
The computer program product of claim 16 , in which the characteristic predicted comprises a width variation or a geographical variation, and the placement or the routing attribute comprises a routing of an interconnect feature across the integrated circuit.
Claim 23
Dependent Claim
22 words
The computer program product of claim 16 , in which the characteristic predicted comprises placement of a dummy or a slotting structure.
Claim 24
Dependent Claim
23 words
The computer program product of claim 16 , in which the characteristic predicted comprises a geometry of a dummy or a slotting structure.
Claim 25
Dependent Claim
58 words
The computer program product of claim 16 , wherein the analysis of the interaction between the fabrication process and the second fabrication process for the integrated circuit comprises an electrical impact analysis that is used by the act of using the pattern-dependent model of the fabrication process to predict the variation of the characteristic of the integrated circuit.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2014-06-13 | 2014-12-13 | 2015-06-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2018-06-13 | 2018-12-13 | 2019-06-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2022-06-13 | 2022-12-13 | 2023-06-14 | $7700.00 | Window Closed / Lapsed |