US5972541A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Reticle and method of design to correct pattern for depth of focus problems
Assignee: Bell Semiconductor LLC
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Filing: 1998-03-04
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Granted: 1999-10-26
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Expires: 2018-03-04
Abstract
Abstract A method and apparatus for converting a layout design for the metallization layer integrated circuit pattern to a reticle design having corrections for depth of focus problems. The apparatus includes a design rule checker which is configured to identify locations of the layout design which are expected to produce narrowed regions of the image caused by depth of focus variations at intersections between defined line features of the layout design and the elevated portions of the topographical variations. A depth of focus correction unit is included which is adapted to modify the layout design for the metallization integrated circuit pattern at the locations by increasing the line width of the defined line features from the integrated circuit pattern to correct for these depth of focus problems.
Inventors
- 👤 Emery O. Sugasawara
- 👤 Mario Garza
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 13:44
CPC Classifications
G; G03; G03F; G03F7/00; G03F7/70; G03F7/70483; G03F1/00; G03F1/36; G03F7/70425; G03F7/70433; G03F7/70441
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
175 words
A method of designing a reticle for producing an image of a metallization layer integrated circuit pattern when radiation is directed through the reticle and onto a resist coated metal surface of a wafer, the reticle being corrected for depth of focus problems caused by the projection of the image onto elevated portions of topographical variations of the metal surface caused by the underlying geometry, the method comprising the steps of: (a) obtaining a layout design for the metallization layer integrated circuit pattern to be formed on the metal surface, the pattern having defined line features; (b) on the defined line features, identifying locations which are expected to produce narrowed regions of the image caused by depth of focus variations at their intersections with the elevated portions of the topographical variations; and (c) producing a reticle design by modifying said layout design for the metallization layer integrated circuit pattern such that said locations on the defined line features include line width increases from the integrated circuit pattern to correct for these depth of focus problems.
Claim 2
Independent Claim
175 words
A method of designing a reticle for producing an image of a metallization layer integrated circuit pattern when radiation is directed through the reticle and onto a resist coated metal surface of a wafer, the reticle being corrected for depth of focus problems caused by the projection of the image onto elevated portions of topographical variations of the metal surface caused by the underlying geometry, the method comprising the steps of: (a) obtaining a layout design for the metallization layer integrated circuit pattern to be formed on the metal surface, the pattern having defined line features; (b) on the defined line features, identifying locations which are expected to produce narrowed regions of the image caused by depth of focus variations at their intersections with the elevated portions of the topographical variations; and (c) producing a reticle design by modifying said layout design for the metallization layer integrated circuit pattern such that said locations on the defined line features include line width increases from the integrated circuit pattern to correct for these depth of focus problems.
Claim 3
Dependent Claim
25 words
The method of claim 1 wherein, the layout design for the integrated circuit pattern employed in step (a) has not been corrected for optical distortion.
Claim 4
Dependent Claim
20 words
The method of claim 1 wherein, the layout design for the integrated circuit pattern is provided as a digital representation.
Claim 5
Dependent Claim
20 words
The method of claim 3 wherein, the identifying step (b) is performed with the aid of design rule checking software.
Claim 6
Dependent Claim
42 words
The method of claim 4 wherein, the design rule checking software identifies said locations by determining where the underlying geometry of a gate level integrated circuit pattern intersects metal line features on said layout design for the metallization layer integrated circuit pattern.
Claim 7
Dependent Claim
30 words
The method of claim 5 wherein, the determining step is further performed by estimating where the expected elevated portions at the intersection the metal line features surpass a predetermined height.
Claim 8
Dependent Claim
21 words
The method of claim 6 wherein, said predetermined height is in the range of about 0.03 μm to about 0.10 μm.
Claim 9
Dependent Claim
23 words
The method of claim 6 wherein, said underlying geometry of the gate level includes the gate features on a gate integrated circuit pattern.
Claim 10
Dependent Claim
25 words
The method of claim 8 wherein, said underlying geometry of the gate level includes the field oxide features on a field oxide integrated circuit pattern.
Claim 11
Dependent Claim
16 words
The method of claim 6 wherein, underlying geometry of the gate level includes the gate geometry's.
Claim 12
Dependent Claim
23 words
The method of claim 1 wherein, the line widths are increased by adding rectangular regions of constant specified dimensions centered on said locations.
Claim 13
Dependent Claim
20 words
The method of claim 1 further comprising a step of: converting said reticle design to a pattern on a reticle.
Claim 14
Dependent Claim
100 words
A reticle design having correction for depth of focus problems caused by the projection of an image of a metallization layer integrated circuit pattern onto elevated portions of topographical variations of a metal surface of a wafer which result from the underlying geometry, the reticle design comprising: a layout design for the metallization layer integrated circuit pattern modified such that defined line feature locations on said layout design that intersect said elevated portions of the topographical variations contain increased line widths of the defined line feature from the integrated circuit pattern which reduce depth of focus problems in said image.
Claim 15
Dependent Claim
100 words
A reticle design having correction for depth of focus problems caused by the projection of an image of a metallization layer integrated circuit pattern onto elevated portions of topographical variations of a metal surface of a wafer which result from the underlying geometry, the reticle design comprising: a layout design for the metallization layer integrated circuit pattern modified such that defined line feature locations on said layout design that intersect said elevated portions of the topographical variations contain increased line widths of the defined line feature from the integrated circuit pattern which reduce depth of focus problems in said image.
Claim 16
Dependent Claim
24 words
The reticle design according to claim 13 wherein, said increases in line widths include rectangular regions of constant specified dimensions centered on said locations.
Claim 17
Dependent Claim
16 words
The reticle design according to claim 13 wherein, said reticle design is provided on a reticle.
References Cited (Backward Citations)
US5705301A
Cited
US5723233A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-10-25 | 2003-04-26 | 2003-10-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-10-25 | 2007-04-26 | 2007-10-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-10-25 | 2011-04-26 | 2011-10-26 | $7700.00 | Window Closed / Lapsed |