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Patent US7279732B2 successfully refreshed from Google Patents.
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US7279732B2 Expired / Lapsed US ⏱️ 0.0 years remaining

Enhanced atomic layer deposition

Assignee: Round Rock Research LLC
•
Filing: 2004-05-26
•
Granted: 2007-10-09
•
Expires: 2024-05-26
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Abstract

Abstract A method of enhanced atomic layer deposition is described. In an embodiment, the enhancement is the use of plasma. Plasma begins prior to flowing a second precursor into the chamber. The second precursor reacts with a prior precursor to deposit a layer on the substrate. In an embodiment, the layer includes at least one element from each of the first and second precursors. In an embodiment, the layer is TaN. In an embodiment, the precursors are TaF 5 and NH 3 . In an embodiment, the plasma begins during the purge gas flow between the pulse of first precursor and the pulse of second precursor. In an embodiment, the enhancement is thermal energy. In an embodiment, the thermal energy is greater than generally accepted for ALD (>300 degrees Celsius). The enhancement assists the reaction of the precursors to deposit a layer on a substrate.

Inventors

  • 👤 Shuang Meng
  • 👤 Garo J. Derderian
  • 👤 Gurtej Singh Sandhu

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 00:53
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/60; H10D64/66; H10D64/68; H10D64/681; C; C23; C23C; C23C16/00; C23C16/44; C23C16/455; C23C16/45523; C23C16/45525; C23C16/45527; C23C16/45536; C23C16/45542; C23C16/50; C23C16/515; H10D64/01; H10D64/013; H10D64/01302; H10D64/01332; H10D64/01336; H10D64/0134; H10D64/01342; H10D64/685; H10D64/691; H10D64/693; H10P; H10P14/00; H10P14/40; H10P14/42; H10P14/43; H10P14/432; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/032; H10W20/033; H10D1/00; H10D1/60; H10D1/68; H10D1/692; H10D1/696; H10D1/711; H10D1/712; H10D64/01344; H10P14/418; H10P14/60; H10P14/63; H10P14/6326; H10P14/6328; H10P14/6334; H10P14/6336; H10P14/6339; H10P14/69; H10P14/692; H10P14/6938; H10P14/6939; H10P14/69393

Claims Analysis

Total Claims: 49
Claim 1
Independent Claim 76 words
An integrated circuit capacitor, comprising: a first electrode; a second electrode; a dielectric intermediate the first electrode and the second electrode; and an atomic layer deposited, tantalum nitride layer adjacent to and distinct from one of the first electrode and the second electrode, the tantalum nitride barrier layer having a ratio of Ta:N of 1:1 with impurities of less than about 10%, wherein the tantalum nitride barrier layer has fluorine impurities of less than about 10%.
Claim 2
Dependent Claim 76 words
An integrated circuit capacitor, comprising: a first electrode; a second electrode; a dielectric intermediate the first electrode and the second electrode; and an atomic layer deposited, tantalum nitride layer adjacent to and distinct from one of the first electrode and the second electrode, the tantalum nitride barrier layer having a ratio of Ta:N of 1:1 with impurities of less than about 10%, wherein the tantalum nitride barrier layer has fluorine impurities of less than about 10%.
Claim 3
Dependent Claim 21 words
The capacitor of claim 1 , wherein the at least one of the first electrode and the second electrode include platinum.
Claim 4
Dependent Claim 21 words
The capacitor of claim 1 , wherein the at least one of the first electrode and the second electrode include rhodium.
Claim 5
Dependent Claim 58 words
The capacitor of claim 1 , wherein the dielectric layer includes at least one of Ba Z Sr (1-z) TiO 3 [BST; where 0<z<1], BaTiO 3 , SrTiO 3 , PbTiO 3 , Pb(Zr,Ti)O 3 [PZT], (Pb,La)(Zr,Ti)O 3 [PLZT], (Pb,La)TiO 3 [PLT], Ta 2 O 5 , KNO 3 , Al 2 O 3 and LiNbO 3 .
Claim 6
Dependent Claim 26 words
The capacitor of claim 1 , wherein the dielectric layer includes at least one of a high k oxide, a multilayer oxide and a doped oxide.
Claim 7
Dependent Claim 20 words
The capacitor of claim 1 , wherein the first electrode includes a metal and the second electrode includes a metal.
Claim 8
Dependent Claim 17 words
The capacitor of claim 1 , wherein the tantalum nitride barrier layer is a diffusion baffler layer.
Claim 9
Dependent Claim 18 words
The capacitor of claim 1 , wherein the tantalum nitride barrier layer is an oxygen diffusion baffler layer.
Claim 10
Dependent Claim 25 words
The capacitor of claim 1 , wherein the first electrode, the second electrode, the dielectric, and the tantalum nitride baffler layer form a memory cell.
Claim 11
Dependent Claim 66 words
An integrated circuit transistor, comprising: a source; a drain; a gate; and an atomic layer deposited, tantalum nitride layer adjacent to and distinct from at least one of the source, the drain and the gate, the tantalum nitride layer having a ratio of Ta:N of 1:1 with impurities of less than about 10%, wherein the tantalum nitride layer has fluorine impurities of less than about 10%.
Claim 12
Dependent Claim 66 words
An integrated circuit transistor, comprising: a source; a drain; a gate; and an atomic layer deposited, tantalum nitride layer adjacent to and distinct from at least one of the source, the drain and the gate, the tantalum nitride layer having a ratio of Ta:N of 1:1 with impurities of less than about 10%, wherein the tantalum nitride layer has fluorine impurities of less than about 10%.
Claim 13
Dependent Claim 16 words
The transistor of claim 10 , wherein the tantalum nitride layer is a diffusion barrier layer.
Claim 14
Dependent Claim 17 words
The transistor of claim 10 , wherein the tantalum nitride layer is an oxygen diffusion barrier layer.
Claim 15
Dependent Claim 54 words
An integrated circuit capacitor, comprising: a first electrode; a second electrode; a dielectric intermediate the first electrode and the second electrode; and an atomic layer deposited, tantalum nitride layer adjacent at least one of the first electrode and the second electrode, wherein the tantalum nitride layer has fluorine impurities of less than about 10%.
Claim 16
Dependent Claim 54 words
An integrated circuit capacitor, comprising: a first electrode; a second electrode; a dielectric intermediate the first electrode and the second electrode; and an atomic layer deposited, tantalum nitride layer adjacent at least one of the first electrode and the second electrode, wherein the tantalum nitride layer has fluorine impurities of less than about 10%.
Claim 17
Dependent Claim 21 words
The capacitor of claim 13 , wherein the at least one of the first electrode and the second electrode include platinum.
Claim 18
Dependent Claim 21 words
The capacitor of claim 13 , wherein the at least one of the first electrode and the second electrode include rhodium.
Claim 19
Dependent Claim 58 words
The capacitor of claim 13 , wherein the dielectric layer includes at least one of Ba z Sr (1-z) TiO 3 [BST; where 0<z<1], BaTiO 3 , SrTiO 3 , PbTiO 3 , Pb(Zr,Ti)O 3 , (Pb,La)(Zr,Ti)O 3 , (Pb,La)TiO 3 , Ta 2 O 5 , KNO 3 , Al 2 O 3 and LiNbO 3 .
Claim 20
Dependent Claim 19 words
The capacitor of claim 13 , wherein the dielectric layer includes at least one of a high k oxide.
Claim 21
Dependent Claim 20 words
The capacitor of claim 13 , wherein the first electrode includes a metal and the second electrode includes a metal.
Claim 22
Dependent Claim 16 words
The capacitor of claim 13 , wherein the tantalum nitride layer is a diffusion barrier layer.
Claim 23
Dependent Claim 17 words
The capacitor of claim 13 , wherein the tantalum nitride layer is an oxygen diffusion barrier layer.
Claim 24
Dependent Claim 24 words
The capacitor of claim 13 , wherein the first electrode, the second electrode, the dielectric, and the tantalum nitride layer form a memory cell.
Claim 25
Dependent Claim 18 words
The capacitor of claim 13 , wherein the tantalum nitride layer having a ratio of Ta:N of 1:1.
Claim 26
Dependent Claim 44 words
An integrated circuit transistor, comprising: a source; a drain; a gate; and an atomic layer deposited, tantalum nitride layer adjacent at least one of the source, the drain and the gate, wherein the tantalum nitride layer has fluorine impurities of less than about 10%.
Claim 27
Dependent Claim 44 words
An integrated circuit transistor, comprising: a source; a drain; a gate; and an atomic layer deposited, tantalum nitride layer adjacent at least one of the source, the drain and the gate, wherein the tantalum nitride layer has fluorine impurities of less than about 10%.
Claim 28
Dependent Claim 16 words
The transistor of claim 23 , wherein the tantalum nitride layer is a diffusion barrier layer.
Claim 29
Dependent Claim 18 words
The transistor of claim 24 , wherein the tantalum nitride layer having a ratio of Ta:N of 1:1.
Claim 30
Dependent Claim 17 words
The transistor of claim 23 , wherein the tantalum nitride layer is an oxygen diffusion barrier layer.
Claim 31
Dependent Claim 63 words
An integrated circuit capacitor, comprising: a first electrode; a second electrode; a dielectric intermediate the first electrode and the second electrode; and an atomic layer deposited, tantalum nitride layer adjacent one of the first electrode and the second electrode, the tantalum nitride layer having a ratio of Ta:N of 1:1, wherein the tantalum nitride layer has silicon impurities of less than about 5%.
Claim 32
Dependent Claim 63 words
An integrated circuit capacitor, comprising: a first electrode; a second electrode; a dielectric intermediate the first electrode and the second electrode; and an atomic layer deposited, tantalum nitride layer adjacent one of the first electrode and the second electrode, the tantalum nitride layer having a ratio of Ta:N of 1:1, wherein the tantalum nitride layer has silicon impurities of less than about 5%.
Claim 33
Dependent Claim 54 words
An integrated circuit transistor, comprising: a source; a drain; agate; and an atomic layer deposited, tantalum nitride layer adjacent at least one of the source, the drain and the gate, the tantalum nitride layer having a ratio of Ta:N of 1:1 wherein the tantalum nitride layer has silicon impurities of less than about 5%.
Claim 34
Dependent Claim 54 words
An integrated circuit transistor, comprising: a source; a drain; agate; and an atomic layer deposited, tantalum nitride layer adjacent at least one of the source, the drain and the gate, the tantalum nitride layer having a ratio of Ta:N of 1:1 wherein the tantalum nitride layer has silicon impurities of less than about 5%.
Claim 35
Dependent Claim 21 words
The capacitor of claim 27 , wherein the at least one of the first electrode and the second electrode include platinum.
Claim 36
Dependent Claim 21 words
The capacitor of claim 27 , wherein the at least one of the first electrode and the second electrode include rhodium.
Claim 37
Dependent Claim 19 words
The capacitor of claim 27 , wherein the dielectric layer includes at least one of barium, strontium and zirconium.
Claim 38
Dependent Claim 16 words
The capacitor of claim 27 , wherein the dielectric layer includes at least a doped oxide.
Claim 39
Dependent Claim 16 words
The capacitor of claim 27 , wherein the tantalum nitride layer is a diffusion barrier layer.
Claim 40
Dependent Claim 16 words
The transistor of claim 28 , wherein the dielectric layer includes at least a doped oxide.
Claim 41
Dependent Claim 17 words
The transistor of claim 28 , wherein the tantalum nitride layer is an oxygen diffusion barrier layer.
Claim 42
Dependent Claim 19 words
The transistor of claim 28 , wherein the dielectric layer includes at least one of barium, strontium and zirconium.
Claim 43
Dependent Claim 58 words
The capacitor of claim 2 , wherein the dielectric layer includes at least one of Ba z Sr (1-z) TiO 3 [BST; where 0<z<1], BaTiO 3 , SrTiO 3 , PbTiO 3 , Pb(Zr,Ti)O 3 [PZT], (Pb,La)(Zr,Ti)O 3 [PLZT], (Pb,La)TiO 3 [PLT], Ta 2 O 5 , KNO 3 , Al 2 O 3 and LiNbO 3 .
Claim 44
Dependent Claim 26 words
The capacitor of claim 2 , wherein the dielectric layer includes at least one of a high k oxide, a multilayer oxide and a doped oxide.
Claim 45
Dependent Claim 17 words
The capacitor of claim 38 , wherein the tantalum nitride barrier layer is a diffusion barrier layer.
Claim 46
Dependent Claim 20 words
The capacitor of claim 8 , wherein the first electrode includes a metal and the second electrode includes a metal.
Claim 47
Dependent Claim 18 words
The capacitor of claim 40 , wherein the tantalum nitride barrier layer is an oxygen diffusion barrier layer.
Claim 48
Dependent Claim 25 words
The capacitor of claim 41 , wherein the first electrode, the second electrode, the dielectric, and the tantalum nitride barrier layer form a memory cell.
Claim 49
Dependent Claim 17 words
The transistor of claim 11 , wherein the tantalum nitride layer is an oxygen diffusion barrier layer.

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