US6002614A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Memory apparatus including programmable non-volatile multi-bit memory cell, and apparatus and method for demarcating memory states of the cell
Assignee: MLC Intellectual Property LLC
•
Filing: 1997-11-21
•
Granted: 1999-12-14
•
Expires: 2017-11-21
Abstract
Abstract Memory states of a multi-bit memory cell are demarcated by generating read reference signals having levels that constitute boundaries of the memory states. The read reference signals are dependent upon the levels of programming reference signals used for controlling the programming of the memory cell. The memory cell can thus be programmed without reading out its memory state during the programming process, with programming margins being assured by the dependence of the read reference signals on the programming reference signals. Both sets of reference signals may be generated by reference cells which track variations in the operating characteristics of the memory cell with changes in conditions, such as temperature and system voltages, to enhance the reliability of memory programming and readout.
Inventors
- 👤 Gerald J. Banks
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 08:33
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/56; G11C11/5621; G11C11/5628; G11C11/5642; G11C16/00; G11C16/02; G11C16/06; G11C16/10; G11C16/14; G11C16/16; G11C16/32; G11C2211/00; G11C2211/56; G11C2211/562; G11C2211/5621; G11C2211/563; G11C2211/5634; G11C2211/564; G11C2211/5642; G11C7/00; G11C7/10; G11C7/1006
Claims Analysis
Total Claims: 84
Claim 1
Independent Claim
100 words
An apparatus for demarcating memory states of an electrically alterable non-volatile memory (EANVM) cell having more than two memory states, said apparatus comprising: a reference signal generating circuit which generates a plurality of signals corresponding to memory states of said EANVM cell, each signal having a level unique to its corresponding memory state and substantially the same as a programming reference level for controlling programming of said EANVM cell to the corresponding memory state, said reference signal generating circuit using said plurality of signals to generate reference signals having levels that constitute boundaries of memory states of said EANVM cell.
Claim 2
Independent Claim
100 words
An apparatus for demarcating memory states of an electrically alterable non-volatile memory (EANVM) cell having more than two memory states, said apparatus comprising: a reference signal generating circuit which generates a plurality of signals corresponding to memory states of said EANVM cell, each signal having a level unique to its corresponding memory state and substantially the same as a programming reference level for controlling programming of said EANVM cell to the corresponding memory state, said reference signal generating circuit using said plurality of signals to generate reference signals having levels that constitute boundaries of memory states of said EANVM cell.
Claim 3
Dependent Claim
26 words
An apparatus according to claim 1, wherein said reference signal generating circuit uses groups of signals from said plurality of signals to generate said reference signals.
Claim 4
Dependent Claim
18 words
An apparatus according to claim 2, wherein each group of signals includes two of said plurality of signals.
Claim 5
Dependent Claim
26 words
An apparatus according to claim 3, wherein said reference signal generating circuit divides combined signal levels of said two signals to produce the corresponding reference signal.
Claim 6
Dependent Claim
42 words
An apparatus according to claim 1, wherein said reference signal generating circuit divides combined signal levels within signal groups corresponding to different memory states to produce the corresponding reference signals, each signal group including at least one of said plurality of signals.
Claim 7
Dependent Claim
37 words
An apparatus according to claim 1, wherein said reference signal generating circuit comprises a plurality of reference cells for generating said plurality of signals, each reference cell being programmed in accordance with the corresponding programming reference level.
Claim 8
Dependent Claim
29 words
An apparatus according to claim 6, wherein said reference cells substantially track changes in operating characteristics of said EANVM cell with changes in conditions that affect the operating characteristics.
Claim 9
Dependent Claim
19 words
An apparatus according to claim 7, wherein said reference cells have substantially the same construction as said EANVM cell.
Claim 10
Dependent Claim
20 words
An apparatus according to claim 7, wherein said reference cells and said EANVM cell constitute elements of an integrated circuit.
Claim 11
Dependent Claim
24 words
An apparatus according to claim 9, wherein said reference cells and said EANVM cell are fabricated by the same process concurrently with each other.
Claim 12
Dependent Claim
15 words
An apparatus according to claim 6, wherein said reference cells are arranged in divider circuits.
Claim 13
Dependent Claim
27 words
An apparatus according to claim 11, wherein at least one of said divider circuits includes a reference cell connected to a signal puller to form a divider.
Claim 14
Dependent Claim
34 words
An apparatus according to claim 11, wherein at least one of said divider circuits includes a pair of reference cells that correspond to different memory states and that are connected to form a divider.
Claim 15
Dependent Claim
22 words
An apparatus according to claim 13, wherein bit lines of said pair of reference cells are connected to form a voltage divider.
Claim 16
Dependent Claim
33 words
An apparatus according to claim 11, wherein the reference cells of said divider circuits substantially track changes in operating characteristics of said EANVM cell with changes in conditions that affect the operating characteristics.
Claim 17
Dependent Claim
24 words
An apparatus according to claim 15, wherein the reference cells of said divider circuits are of substantially the same construction as said EANVM cell.
Claim 18
Dependent Claim
24 words
An apparatus according to claim 15, wherein said EANVM cell and the reference cells of said divider circuits constitute elements of an integrated circuit.
Claim 19
Dependent Claim
24 words
An apparatus according to claim 17, wherein said reference cells and said EANVM cell are fabricated by the same process concurrently with each other.
Claim 20
Dependent Claim
14 words
An apparatus according to claim 11, wherein said divider circuits are voltage divider circuits.
Claim 21
Dependent Claim
109 words
A programmable multi-level memory apparatus, comprising: an electrically alterable non-volatile memory (EANVM) cell having more than two memory states; a programming circuit for programming said EANVM cell; and a reference signal generating circuit which generates a plurality of signals corresponding to memory states of said EANVM cell, each signal having a level unique to its corresponding memory state and substantially the same as a programming reference level for said programming circuit to control programming of said EANVM cell to the corresponding memory state, said reference signal generating circuit using said plurality of signals to generate reference signals having levels that constitute boundaries of memory states of said EANVM cell.
Claim 22
Dependent Claim
109 words
A programmable multi-level memory apparatus, comprising: an electrically alterable non-volatile memory (EANVM) cell having more than two memory states; a programming circuit for programming said EANVM cell; and a reference signal generating circuit which generates a plurality of signals corresponding to memory states of said EANVM cell, each signal having a level unique to its corresponding memory state and substantially the same as a programming reference level for said programming circuit to control programming of said EANVM cell to the corresponding memory state, said reference signal generating circuit using said plurality of signals to generate reference signals having levels that constitute boundaries of memory states of said EANVM cell.
Claim 23
Dependent Claim
26 words
An apparatus according to claim 20, wherein said reference signal generating circuit uses groups of signals from said plurality of signals to generate said reference signals.
Claim 24
Dependent Claim
18 words
An apparatus according to claim 21, wherein each group of signals includes two of said plurality of signals.
Claim 25
Dependent Claim
26 words
An apparatus according to claim 22, wherein said reference signal generating circuit divides combined signal levels of said two signals to produce the corresponding reference signal.
Claim 26
Dependent Claim
42 words
An apparatus according to claim 20, wherein said reference signal generating circuit divides combined signal levels within signal groups corresponding to different memory states to produce the corresponding reference signals, each signal group including at least one of said plurality of signals.
Claim 27
Dependent Claim
37 words
An apparatus according to claim 20, wherein said reference signal generating circuit comprises a plurality of reference cells for generating said plurality of signals, each reference cell being programmed in accordance with the corresponding programming reference level.
Claim 28
Dependent Claim
29 words
An apparatus according to claim 25, wherein said reference cells substantially track changes in operating characteristics of said EANVM cell with changes in conditions that affect the operating characteristics.
Claim 29
Dependent Claim
19 words
An apparatus according to claim 26, wherein said reference cells have substantially the same construction as said EANVM cell.
Claim 30
Dependent Claim
20 words
An apparatus according to claim 26, wherein said reference cells and said EANVM cell constitute elements of an integrated circuit.
Claim 31
Dependent Claim
24 words
An apparatus according to claim 28, wherein said reference cells and said EANVM cell are fabricated by the same process concurrently with each other.
Claim 32
Dependent Claim
15 words
An apparatus according to claim 25, wherein said reference cells are arranged in divider circuits.
Claim 33
Dependent Claim
27 words
An apparatus according to claim 30, wherein at least one of said divider circuits includes a reference cell connected to a signal puller to form a divider.
Claim 34
Dependent Claim
34 words
An apparatus according to claim 30, wherein at least one of said divider circuits includes a pair of reference cells that correspond to different memory states and that are connected to form a divider.
Claim 35
Dependent Claim
22 words
An apparatus according to claim 32, wherein bit lines of said pair of reference cells are connected to form a voltage divider.
Claim 36
Dependent Claim
33 words
An apparatus according to claim 30, wherein the reference cells of said divider circuits substantially track changes in operating characteristics of said EANVM cell with changes in conditions that affect the operating characteristics.
Claim 37
Dependent Claim
24 words
An apparatus according to claim 34, wherein the reference cells of said divider circuits are of substantially the same construction as said EANVM cell.
Claim 38
Dependent Claim
24 words
An apparatus according to claim 34, wherein said EANVM cell and the reference cells of said divider circuits constitute elements of an integrated circuit.
Claim 39
Dependent Claim
24 words
An apparatus according to claim 36, wherein said reference cells and said EANVM cell are fabricated by the same process concurrently with each other.
Claim 40
Dependent Claim
14 words
An apparatus according to claim 30, wherein said divider circuits are voltage divider circuits.
Claim 41
Independent Claim
88 words
An apparatus for demarcating memory states of an electrically alterable non-volatile memory (EANVM) cell having more than two memory states, said apparatus comprising: a reference signal generating circuit which generates reference signals having levels that constitute boundaries of memory states of said EANVM cell, said reference signals being generated dependent upon a plurality of signal levels that are set in substantial correspondence with programming reference levels for controlling programming of said EANVM cell, each programming reference level being unique to a different memory state of said EANVM cell.
Claim 42
Independent Claim
88 words
An apparatus for demarcating memory states of an electrically alterable non-volatile memory (EANVM) cell having more than two memory states, said apparatus comprising: a reference signal generating circuit which generates reference signals having levels that constitute boundaries of memory states of said EANVM cell, said reference signals being generated dependent upon a plurality of signal levels that are set in substantial correspondence with programming reference levels for controlling programming of said EANVM cell, each programming reference level being unique to a different memory state of said EANVM cell.
Claim 43
Dependent Claim
28 words
An apparatus according to claim 39, wherein said reference signal generating circuit generates said reference signals dependent upon groups of signal levels from said plurality of signal levels.
Claim 44
Dependent Claim
20 words
An apparatus according to claim 40, wherein each group of signal levels includes two of said plurality of signal levels.
Claim 45
Dependent Claim
34 words
An apparatus according to claim 39, wherein said reference signal generating circuit generates said reference signals dependent upon groups of signal levels, each group including at least one of said plurality of signal levels.
Claim 46
Dependent Claim
23 words
An apparatus according to claim 39, wherein said reference signal generating circuit includes reference cells programmed to provide said plurality of signal levels.
Claim 47
Dependent Claim
26 words
An apparatus according to claim 39, wherein the level of each boundary is substantially midway between programming reference levels of memory states separated by that boundary.
Claim 48
Dependent Claim
99 words
A programmable multi-level memory apparatus, comprising: an electrically alterable non-volatile memory (EANVM) cell having more than two memory states; a programming circuit for programming said EANVM cell; and a reference signal generating circuit which generates reference signals having levels that constitute boundaries of the memory states of said EANVM cell, said reference signals being generated dependent upon a plurality of signal levels that are set in substantial correspondence with programming reference levels for said programming control circuit to control programming of said EANVM cell, each programming reference level being unique to a different memory state of said EANVM cell.
Claim 49
Dependent Claim
99 words
A programmable multi-level memory apparatus, comprising: an electrically alterable non-volatile memory (EANVM) cell having more than two memory states; a programming circuit for programming said EANVM cell; and a reference signal generating circuit which generates reference signals having levels that constitute boundaries of the memory states of said EANVM cell, said reference signals being generated dependent upon a plurality of signal levels that are set in substantial correspondence with programming reference levels for said programming control circuit to control programming of said EANVM cell, each programming reference level being unique to a different memory state of said EANVM cell.
Claim 50
Dependent Claim
28 words
An apparatus according to claim 45, wherein said reference signal generating circuit generates said reference signals dependent upon groups of signal levels from said plurality of signal levels.
Claim 51
Dependent Claim
20 words
An apparatus according to claim 46, wherein each group of signal levels includes two of said plurality of signal levels.
Claim 52
Dependent Claim
34 words
An apparatus according to claim 45, wherein said reference signal generating circuit generates said reference signals dependent upon groups of signal levels, each group including at least one of said plurality of signal levels.
Claim 53
Dependent Claim
23 words
An apparatus according to claim 45, wherein said reference signal generating circuit includes reference cells programmed to provide said plurality of signal levels.
Claim 54
Dependent Claim
26 words
An apparatus according to claim 45, wherein the level of each boundary is substantially midway between programming reference levels of memory states separated by that boundary.
Claim 55
Dependent Claim
116 words
A programmable multi-level memory apparatus, comprising: an electrically alterable non-volatile memory (EANVM) cell having more than two memory states; a programming reference signal generating circuit including a plurality of reference cells which substantially track changes in operating characteristics of said EANVM cell with changes in conditions that affect the operating characteristics, said plurality of reference cells including a corresponding reference cell for each of said memory states, with each reference cell being programmed such that said programming reference signal generating circuit generates a programming reference signal having a level unique to the corresponding memory state; and a programming circuit which programs said EANVM cell in accordance with the respective levels of the programming reference signals selectively.
Claim 56
Dependent Claim
116 words
A programmable multi-level memory apparatus, comprising: an electrically alterable non-volatile memory (EANVM) cell having more than two memory states; a programming reference signal generating circuit including a plurality of reference cells which substantially track changes in operating characteristics of said EANVM cell with changes in conditions that affect the operating characteristics, said plurality of reference cells including a corresponding reference cell for each of said memory states, with each reference cell being programmed such that said programming reference signal generating circuit generates a programming reference signal having a level unique to the corresponding memory state; and a programming circuit which programs said EANVM cell in accordance with the respective levels of the programming reference signals selectively.
Claim 57
Dependent Claim
19 words
An apparatus according to claim 51, wherein said reference cells have substantially the same construction as said EANVM cell.
Claim 58
Dependent Claim
22 words
An apparatus according to claim 51, wherein said EANVM cell and said plurality of reference cells constitute elements of an integrated circuit.
Claim 59
Dependent Claim
14 words
An apparatus according to claim 53, wherein said reference cells are non-volatile memory cells.
Claim 60
Dependent Claim
19 words
An apparatus according to claim 54, wherein said reference cells have substantially the same construction as said EANVM cell.
Claim 61
Dependent Claim
23 words
An apparatus according to claim 51, wherein each programming reference signal is constituted by a bit line signal of the corresponding reference cell.
Claim 62
Dependent Claim
43 words
An apparatus according to claim 51, wherein each memory state is bounded by at least one reference level that is substantially midway between a programming reference signal level for that memory state and a programming reference signal level for an adjacent memory state.
Claim 63
Independent Claim
89 words
A method of demarcating memory states of an electrically alterable non-volatile memory (EANVM) cell having more than two memory states, said method comprising: producing a plurality of signals corresponding to memory states of said EANVM cell, each signal having a level unique to its corresponding memory state and substantially the same as a programming reference level for controlling programming of said EANVM cell to the corresponding memory state; and generating reference signals having levels that constitute boundaries of memory states of said EANVM cell using said plurality of signals.
Claim 64
Independent Claim
89 words
A method of demarcating memory states of an electrically alterable non-volatile memory (EANVM) cell having more than two memory states, said method comprising: producing a plurality of signals corresponding to memory states of said EANVM cell, each signal having a level unique to its corresponding memory state and substantially the same as a programming reference level for controlling programming of said EANVM cell to the corresponding memory state; and generating reference signals having levels that constitute boundaries of memory states of said EANVM cell using said plurality of signals.
Claim 65
Dependent Claim
18 words
A method according to claim 58, wherein said generating uses groups of signals from said plurality of signals.
Claim 66
Dependent Claim
19 words
A method according to claim 59, wherein said generating includes dividing combined signal levels within each group of signals.
Claim 67
Dependent Claim
45 words
A method according to claim 58, wherein said generating includes dividing combined signal levels within signal groups that correspond to different memory states of said EANVM cell to produce the corresponding reference signals, each signal group including at least one of said plurality of signals.
Claim 68
Dependent Claim
32 words
A method according to claim 58, wherein said plurality of signals are produced using a plurality of reference cells, each reference cell being programmed in accordance with the corresponding programming reference level.
Claim 69
Dependent Claim
29 words
A method according to claim 62, wherein said reference cells substantially track changes in operating characteristics of said EANVM cell with changes in conditions that affect the operating conditions.
Claim 70
Dependent Claim
20 words
A method according to claim 63, wherein said reference cells are arranged in divider circuits to produce said reference signals.
Claim 71
Dependent Claim
27 words
A method according to claim 64, wherein at least one of said divider circuits includes a reference cell connected to a signal puller to form a divider.
Claim 72
Dependent Claim
34 words
A method according to claim 64, wherein at least one of said divider circuits includes a pair of reference cells that correspond to different memory states and that are connected to form a divider.
Claim 73
Independent Claim
84 words
A method of demarcating memory states of an electrically alterable non-volatile memory (EANVM) cell having more than two memory states, said method comprising: setting levels of a plurality of signals in substantial correspondence with programming reference levels for controlling programming of said EANVM cell, each programming reference level being unique to a different memory state of said EANVM cell; and generating reference signals having levels that constitute boundaries of the memory states of said EANVM dependent upon the levels of said plurality of signals.
Claim 74
Independent Claim
84 words
A method of demarcating memory states of an electrically alterable non-volatile memory (EANVM) cell having more than two memory states, said method comprising: setting levels of a plurality of signals in substantial correspondence with programming reference levels for controlling programming of said EANVM cell, each programming reference level being unique to a different memory state of said EANVM cell; and generating reference signals having levels that constitute boundaries of the memory states of said EANVM dependent upon the levels of said plurality of signals.
Claim 75
Dependent Claim
22 words
A method according to claim 67, wherein said reference signals are generated dependent upon groups of signals from said plurality of signals.
Claim 76
Dependent Claim
26 words
A method according to claim 68, wherein said reference signals are generated dependent upon a result of dividing combined signal levels within each group of signals.
Claim 77
Dependent Claim
36 words
A method according to claim 69, wherein said reference signals are generated dependent upon signal groups corresponding to different memory states of said EANVM cell, each group including at least one of said plurality of signals.
Claim 78
Dependent Claim
26 words
A method according to claim 69, wherein said setting uses reference cells programmed to provide signal levels substantially the same as said programming reference signal levels.
Claim 79
Dependent Claim
29 words
A method according to claim 71, wherein said reference cells substantially track changes in operating characteristics of said EANVM cell with changes in conditions that affect the operating conditions.
Claim 80
Dependent Claim
20 words
A method according to claim 72, wherein said reference cells are arranged in divider circuits to produce said reference signals.
Claim 81
Dependent Claim
27 words
A method according to claim 73, wherein at least one of said divider circuits includes a reference cell connected to a signal puller to form a divider.
Claim 82
Dependent Claim
34 words
A method according to claim 73, wherein at least one of said divider circuits includes a pair of reference cells that correspond to different memory states and that are connected to form a divider.
Claim 83
Dependent Claim
35 words
An apparatus according to claim 13, wherein said at least one divider circuit includes a signal puller that compensates for deviation of a signal provided by the pair of reference cells from a prescribed level.
Claim 84
Dependent Claim
35 words
An apparatus according to claim 32, wherein said at least one divider circuit includes a signal puller that compensates for deviation of a signal provided by the pair of reference cells from a prescribed level.
References Cited (Backward Citations)
US3660819A
Cited
US3755721A
Cited
US3801965A
Cited
US4054864A
Cited
US4004159A
Cited
US4122541A
Cited
US4139910A
Cited
US4090258A
Cited
US4149270A
Cited
US4181980A
Cited
US4192014A
Cited
US4272830A
Cited
US4287570A
Cited
US4357685A
Cited
US4300210A
Cited
US4306300A
Cited
US4327424A
Cited
US4503518A
Cited
US4415992A
Cited
US4449203A
Cited
US4417325A
Cited
US4448400A
Cited
US4612629A
Cited
US4388702A
Cited
US4462088A
Cited
US4495602A
Cited
US4627027A
Cited
US4586163A
Cited
US4558241A
Cited
US4709350A
Cited
US4578777A
Cited
US4653023A
Cited
US4661929A
Cited
US4771404A
Cited
US4799195A
Cited
US4733394A
Cited
US4701884A
Cited
US4853892A
Cited
US4847808A
Cited
US4809224A
Cited
US4903236A
Cited
US5014242A
Cited
US5021999A
Cited
FR2630574A1
Cited
US4964079A
Cited
US5268318A
Cited
US5568439A
Cited
US5544118A
Cited
US5043940A
Cited
US5095344A
Cited
US5554553A
Cited
US5168465A
Cited
US5293560A
Cited
US5198380A
Cited
US5583812A
Cited
US5712819A
Cited
US5434825A
Cited
US5642312A
Cited
US5268319A
Cited
US5268870A
Cited
US4989179A
Cited
US4890259A
Cited
US5262984A
Cited
US4914631A
Cited
EP0390404B1
Cited
US5172338B1
Cited
US5172338A
Cited
US5163021A
Cited
US5258958A
Cited
US5321655A
Cited
US5200959A
Cited
US5307304A
Cited
US5299165A
Cited
US5351210A
Cited
US5218569A
Cited
US5272669A
Cited
US5295255A
Cited
US5806070A
Cited
US5430859A
Cited
US5776810A
Cited
US5712180A
Cited
US5313421A
Cited
US5657332A
Cited
US5659550A
Cited
US5428621A
Cited
US5596527A
Cited
US5506813A
Cited
US5495442A
Cited
US5432735A
Cited
US5422842A
Cited
US5457650A
Cited
US5422845A
Cited
US5440505A
Cited
US5566125A
Cited
US5546042A
Cited
US5497119A
Cited
US5444656A
Cited
US5523972A
Cited
US5796667A
Cited
US5781472A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-12-13 | 2003-06-14 | 2003-12-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-12-13 | 2007-06-14 | 2007-12-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-12-13 | 2011-06-14 | 2011-12-14 | $7700.00 | Window Closed / Lapsed |