US6581191B1 — Hardware debugging in a hardware description lang…

Claim 1

Independent Claim 190 words

A hardware debugging system for debugging a fabricated integrated circuit containing an electronic circuit design, said hardware debugging system comprising: an instrumentor configured to receive a high level HDL description of the electronic circuit design, to determine aspects of the electronic circuit design to be examined or modified during debugging, to determine additional circuitry to be incorporated into the electronic circuit design to facilitate debugging, and to produce a modified high level HDL description of the electronic circuit design by incorporating an HDL description of the additional circuitry into the high level HDL description of the electronic circuit design; a design instrumentation database configured to store information about the additional circuitry including relationships between signals of the electronic circuit design and portions of the modified high level HDL description or the high level HDL description; and a HDL-based hardware debugger configured to debug the fabricated integrated circuit fabricated in accordance with the modified high level HDL description by interacting with the electronic circuit design using the additional circuitry and by operating to present debug information with respect to the modified high level HDL description or the high level HDL description.

Claim 2

Dependent Claim 190 words

A hardware debugging system for debugging a fabricated integrated circuit containing an electronic circuit design, said hardware debugging system comprising: an instrumentor configured to receive a high level HDL description of the electronic circuit design, to determine aspects of the electronic circuit design to be examined or modified during debugging, to determine additional circuitry to be incorporated into the electronic circuit design to facilitate debugging, and to produce a modified high level HDL description of the electronic circuit design by incorporating an HDL description of the additional circuitry into the high level HDL description of the electronic circuit design; a design instrumentation database configured to store information about the additional circuitry including relationships between signals of the electronic circuit design and portions of the modified high level HDL description or the high level HDL description; and a HDL-based hardware debugger configured to debug the fabricated integrated circuit fabricated in accordance with the modified high level HDL description by interacting with the electronic circuit design using the additional circuitry and by operating to present debug information with respect to the modified high level HDL description or the high level HDL description.

Claim 3

Dependent Claim 33 words

A hardware debugging system as recited in claim 1 , wherein while debugging the fabricated integrated circuit, the fabricated integrated circuit is operating in its target environment and running at its target speed.

Claim 4

Dependent Claim 17 words

A hardware debugging system as recited in claim 2 , wherein the target environment includes real-time characteristics.

Claim 5

Dependent Claim 29 words

A hardware debugging system as recited in claim 1 , wherein while debugging the fabricated integrated circuit, the fabricated integrated circuit is operating in its target environment without interruption.

Claim 6

Dependent Claim 20 words

A hardware debugging system as recited in claim 1 , wherein said hardware debugging system does not require a testbench.

Claim 7

Dependent Claim 33 words

A hardware debugging system as recited in claim 1 , wherein at least a portion of the debug information is related back to the high level HDL description for the electronic circuit design.

Claim 8

Dependent Claim 32 words

A hardware debugging system as recited in claim 1 , wherein the information about the additional circuitry stored in said design instrumentation database further includes at least one or more trigger conditions.

Claim 9

Dependent Claim 41 words

A hardware debugging system as recited in claim 1 , wherein the information about the additional circuitry stored in said design instrumentation database further includes at least one or more of design control information, design visibility information and design patch information.

Claim 10

Dependent Claim 42 words

A hardware debugging system as recited in claim 1 , wherein said instrumentor comprises: an aspect selection processor configured to enable a user to determine the aspects of the electronic circuit design to be examined or modified during debugging through interactive selection.

Claim 11

Dependent Claim 51 words

A hardware debugging system as recited in claim 1 , wherein the fabricated integrated circuit is part of an electronic system that also includes software, and wherein said hardware debugging system further comprises: a software debugger operatively connected to said HDL-based hardware debugger, said software debugger operates to debug the software.

Claim 12

Dependent Claim 27 words

A hardware debugging system as recited in claim 10 , wherein the fabricated integrated circuit includes a processor, and wherein the software is executed by said processor.

Claim 13

Dependent Claim 28 words

A hardware debugging system as recited in claim 10 , wherein said HDL-based hardware debugger and said software debugger are synchronized during debugging of the fabricated integrated circuit.

Claim 14

Dependent Claim 39 words

A hardware debugging system as recited in claim 12 , wherein while said HDL-based hardware debugger operates to debug the fabricated integrated circuit, the fabricated integrated circuit is operating in its target environment and running at its target speed.

Claim 15

Dependent Claim 17 words

A hardware debugging system as recited in claim 13 , wherein the target environment includes real-time characteristics.

Claim 16

Dependent Claim 20 words

A hardware debugging system as recited in claim 13 , wherein said hardware debugging system does not require a testbench.

Claim 17

Dependent Claim 31 words

A hardware debugging system as recited in claim 1 , wherein said instrumentor operates to customize the additional circuitry for use with at least a portion of the electronic circuit design.

Claim 18

Dependent Claim 22 words

A hardware debugging system as recited in claim 1 , wherein the HDL description contains a hierarchical structure of HDL building blocks.

Claim 19

Dependent Claim 39 words

A hardware debugging system as recited in claim 17 , wherein the aspects of the electronic circuit design to be examined or modified during debugging are determined in different ones of the HDL building blocks of the hierarchical structure.

Claim 20

Dependent Claim 21 words

A hardware debugging system as recited in claim 1 , wherein the electronic circuit design includes both analog and digital aspects.

Claim 21

Dependent Claim 28 words

A hardware debugging system as recited in claim 1 , wherein said instrumentor operates to permit alteration of the additional circuitry to trade-off debugging coverage versus area cost.

Claim 22

Dependent Claim 26 words

A hardware debugging system as recited in claim 1 , wherein the electronic circuit design includes at least one pre-designed block of circuitry having instrumentation circuitry.

Claim 23

Dependent Claim 158 words

A hardware debugging system for debugging an electronic system containing an electronic circuit design, the electronic circuit design being described by a high level HDL description, said hardware debugging system comprising: an instrumentor configured to receive the high level HDL description of the electronic circuit design or a description derived therefrom, to determine aspects of the electronic circuit design to be examined or modified during debugging, to determine additional circuitry to be incorporated into the electronic circuit design to facilitate debugging, and to incorporate the additional circuitry into the electronic circuit design; a design instrumentation database configured to store information about the additional circuitry including relationships between signals of the electronic circuit design and portions of the high level HDL description; and a HDL-based hardware debugger configured to debug the electronic system by interacting with the electronic circuit design using the additional circuitry and by operating to present debug information with respect to the high level HDL description.

Claim 24

Dependent Claim 158 words

A hardware debugging system for debugging an electronic system containing an electronic circuit design, the electronic circuit design being described by a high level HDL description, said hardware debugging system comprising: an instrumentor configured to receive the high level HDL description of the electronic circuit design or a description derived therefrom, to determine aspects of the electronic circuit design to be examined or modified during debugging, to determine additional circuitry to be incorporated into the electronic circuit design to facilitate debugging, and to incorporate the additional circuitry into the electronic circuit design; a design instrumentation database configured to store information about the additional circuitry including relationships between signals of the electronic circuit design and portions of the high level HDL description; and a HDL-based hardware debugger configured to debug the electronic system by interacting with the electronic circuit design using the additional circuitry and by operating to present debug information with respect to the high level HDL description.

Claim 25

Dependent Claim 34 words

A hardware debugging system as recited in claim 22 , wherein said HDL-based hardware debugger operates to identify functional failures that result from not only design errors but also tool errors or manufacturing faults.

Claim 26

Dependent Claim 26 words

A hardware debugging system as recited in claim 22 , wherein said HDL-based hardware debugger further operates to identify functional failures that result from specification errors.

Claim 27

Dependent Claim 37 words

A hardware debugging system as recited in claim 22 , wherein while said HDL-based hardware debugger operates to debug the electronic system, the electronic system is operating in its target environment and running at its target speed.

Claim 28

Dependent Claim 17 words

A hardware debugging system as recited in claim 25 , wherein the target environment includes real-time characteristics.

Claim 29

Dependent Claim 20 words

A hardware debugging system as recited in claim 25 , wherein said hardware debugging system does not require a testbench.

Claim 30

Dependent Claim 31 words

A hardware debugging system as recited in claim 22 , wherein said instrumentor operates to customize the additional circuitry for use with at least a portion of the electronic circuit design.

Claim 31

Dependent Claim 22 words

A hardware debugging system as recited in claim 22 , wherein the HDL description contains a hierarchical structure of HDL building blocks.

Claim 32

Dependent Claim 39 words

A hardware debugging system as recited in claim 29 , wherein the aspects of the electronic circuit design to be examined or modified during debugging are determined in different ones of the HDL building blocks of the hierarchical structure.

Claim 33

Dependent Claim 21 words

A hardware debugging system as recited in claim 22 , wherein the electronic circuit design includes both analog and digital aspects.

Claim 34

Dependent Claim 28 words

A hardware debugging system as recited in claim 22 , wherein said instrumentor operates to permit alteration of the additional circuitry to trade-off debugging coverage versus area cost.

Claim 35

Dependent Claim 26 words

A hardware debugging system as recited in claim 22 , wherein the electronic circuit design includes at least one pre-designed block of circuitry having internal circuitry.

Claim 36

Dependent Claim 46 words

A hardware debugging system as recited in claim 22 , wherein said hardware debugging system further comprises at least one of a design layout, synthesis or simulation tool, and wherein said instrumentor is within said at least one of the design layout, synthesis or simulation tool.

Claim 37

Dependent Claim 49 words

A hardware debugging system as recited in claim 22 , wherein the electronic system includes hardware and software, and wherein said hardware debugging system further comprises: a software debugger operatively connected to said HDL-based hardware debugger, said software debugger operates to debug the software of the electronic circuit design.

Claim 38

Dependent Claim 26 words

A hardware debugging system as recited in claim 35 , wherein the electronic system includes a processor, and wherein the software is executed by said processor.

Claim 39

Dependent Claim 27 words

A hardware debugging system as recited in claim 35 , wherein said HDL-based hardware debugger and said software debugger are synchronized during debugging of the electronic system.

Claim 40

Dependent Claim 35 words

A hardware debugging system as recited in claim 22 , wherein the electronic system comprises an integrated circuit hardware product, the integrated circuit hardware product including at least a portion of the electronic circuit design.

Claim 41

Dependent Claim 36 words

A hardware debugging system as recited in claim 22 , wherein the electronic system comprises a programmable integrated circuit, the programmable integrated circuit being programmed to include at least a portion of the electronic circuit design.

Claim 42

Dependent Claim 37 words

A hardware debugging system as recited in claim 22 , wherein the electronic system comprises a printed circuit board with electronic components thereon, the printed circuit board including at least a portion of the electronic circuit design.

Claim 43

Dependent Claim 140 words

A hardware debugging system for debugging an electronic system containing an electronic circuit design, the electronic circuit design being described by a high level HDL description, said hardware debugging system comprising: instrumentation means for receiving the high level HDL description of the electronic circuit design or a description derived therefrom, determining additional circuitry to be incorporated into the electronic circuit design to facilitate debugging, and incorporating the additional circuitry into the electronic circuit design; a design instrumentation database configured to store information about the additional circuitry including relationships between signals of the electronic circuit design and portions of the high level HDL description; and a HDL-based hardware debugger configured to debug the electronic system by interacting with the electronic circuit design using the additional circuitry and by operating to present debug information with respect to the high level HDL description.

Claim 44

Dependent Claim 140 words

A hardware debugging system for debugging an electronic system containing an electronic circuit design, the electronic circuit design being described by a high level HDL description, said hardware debugging system comprising: instrumentation means for receiving the high level HDL description of the electronic circuit design or a description derived therefrom, determining additional circuitry to be incorporated into the electronic circuit design to facilitate debugging, and incorporating the additional circuitry into the electronic circuit design; a design instrumentation database configured to store information about the additional circuitry including relationships between signals of the electronic circuit design and portions of the high level HDL description; and a HDL-based hardware debugger configured to debug the electronic system by interacting with the electronic circuit design using the additional circuitry and by operating to present debug information with respect to the high level HDL description.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	2006-06-16	2006-12-16	2007-06-17	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	2010-06-16	2010-12-16	2011-06-17	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	2014-06-16	2014-12-16	2015-06-17	$7700.00	Window Closed / Lapsed

Hardware debugging in a hardware description language

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