US5369593A
Expired / Lapsed
US
⏱️ 0.0 years remaining
System for and method of connecting a hardware modeling element to a hardware modeling system
Assignee: Synopsys Inc
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Filing: 1991-10-18
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Granted: 1994-11-29
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Expires: 2011-10-18
Abstract
Abstract An improved system for and method of connecting a hardware modeling element to the pin electronics circuitry of a hardware modeling system, with the improved system having circuitry and structures that will allow it to be connected to a hardware modeling system that is powered, circuitry to indicate to the pin electronics circuitry that the improved system is connected to it, circuitry to identify the hardware modeling element supported by the improved system to the hardware modeling system, circuitry to indicate to the hardware modeling system when the hardware modeling element is initialized so evaluation of it by the hardware modeling system can commence, circuitry to generate selectable supply voltages for the powering the hardware modeling element, and a hardware modeling element connector that will allow the connection of a family of hardware modeling elements to the same connector without the need to change the connector.
Inventors
- 👤 Mark S. Papamarcos
- 👤 Andrew J. Read
- 👤 Wayne P. Heideman
- 👤 Robert K. Mardjuki
- 👤 Robert K. Couch
- 👤 Peter R. Jaeger
- 👤 William F. Kappauf
- 👤 Melvin Rudin
- 👤 Norman F. Kelly
- 👤 Lawrence C. Widdoes, Jr.
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 10:56
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/28; G01R31/317; G01R31/3181; G01R31/3183; G01R31/318342; G01R31/318357; H; H01; H01R; H01R29/00; Y; Y10; Y10S; Y10S439/00; Y10S439/955
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
240 words
A system for connecting at least one electronic device or circuitry to a hardware modeler when the hardware modeler is powered, for evaluating the performance of the electronic device or circuitry in response to stimuli provided by the modeler, comprising: connector means, for connection with the electronic device or circuitry, having at least one segment for mating with a section of the hardware modeler when the hardware modeler is powered, such that electrical signals can be bi-directionally transmitted between the connector means and the modeler; and insertion circuit means, connected to the connector means, and having at least one electrical signal output, said insertion circuit means including electrostatic charge dissipation circuitry connected to the connector means configured to effect first contact with the mating section of the hardware modeler during mating to dissipate electrostatic charge on the system, ground equalization circuitry connected to the connector means configured to effect second contact with the mating section of the modeler to equalize ground levels of the system and the hardware modeler, and power supply control circuitry connected to the connector means configured to effect third contact with the mating section of the modeler to allow ramp-up of a power supply voltage input to the system based on a predetermined time constant said insertion circuit means and said connector means allowing for the connection and use of more than one electronic device or circuitry with a powered hardware modeler at any given time.
Claim 2
Independent Claim
240 words
A system for connecting at least one electronic device or circuitry to a hardware modeler when the hardware modeler is powered, for evaluating the performance of the electronic device or circuitry in response to stimuli provided by the modeler, comprising: connector means, for connection with the electronic device or circuitry, having at least one segment for mating with a section of the hardware modeler when the hardware modeler is powered, such that electrical signals can be bi-directionally transmitted between the connector means and the modeler; and insertion circuit means, connected to the connector means, and having at least one electrical signal output, said insertion circuit means including electrostatic charge dissipation circuitry connected to the connector means configured to effect first contact with the mating section of the hardware modeler during mating to dissipate electrostatic charge on the system, ground equalization circuitry connected to the connector means configured to effect second contact with the mating section of the modeler to equalize ground levels of the system and the hardware modeler, and power supply control circuitry connected to the connector means configured to effect third contact with the mating section of the modeler to allow ramp-up of a power supply voltage input to the system based on a predetermined time constant said insertion circuit means and said connector means allowing for the connection and use of more than one electronic device or circuitry with a powered hardware modeler at any given time.
Claim 3
Dependent Claim
23 words
The system as recited in claim 1, wherein the connector means further comprises a multi-pin electrical connector with first, second, and third segments.
Claim 4
Dependent Claim
50 words
The system as recited in claim 2 wherein, the first segment comprises at least one pin that is longer than the pins of the second and third segments and the second segment comprises at least one pin that is longer than at least one pin that comprises the third segment.
Claim 5
Dependent Claim
32 words
The system as recited in claim 1, wherein the power supply control circuitry includes circuitry that will ramp-up a power supply voltage input to the system based on a predetermined time constant.
Claim 6
Dependent Claim
16 words
The system as recited in claim 4, wherein the time constant is greater than 1 ms.
Claim 7
Dependent Claim
30 words
The system as recited in claim 1 wherein the power supply control circuitry includes circuitry that will ramp-up the current input to the system based on a predetermined time constant.
Claim 8
Dependent Claim
16 words
The system as recited in claim 6, wherein the time constant is greater than 1 ms.
Claim 9
Dependent Claim
34 words
The system as recited in claim 1, wherein the system further comprises means to refresh the electronic device or circuitry when the electronic device or circuitry is unaccessed for a predetermined period of time.
Claim 10
Dependent Claim
30 words
The system as recited in claim 1, wherein the system includes circuitry to provide predetermined electrical signals to the hardware modeler when the system is connected to the hardware modeler.
Claim 11
Dependent Claim
24 words
The system as recited in claim 1, wherein the system includes indicator means to indicate when the system is powered by the hardware modeler.
Claim 12
Dependent Claim
15 words
The system as recited in claim 10, wherein the indicator means includes a light-emitting diode.
Claim 13
Dependent Claim
15 words
The system as recited in claim 11 wherein, the indicator means includes a light-emitting diode.
Claim 14
Dependent Claim
29 words
The system as recited in claim 1, wherein the system includes indicator means to indicate when the hardware modeler accesses the electronic device or circuitry connected to the system.
Claim 15
Dependent Claim
37 words
The system as recited in claim 1, wherein the system has means for providing electrical signals representative of the internal state of the electronic device or circuitry to determine when such electronic device or circuitry is initialized.
Claim 16
Dependent Claim
33 words
The system as recited in claim 1, wherein the system includes means for providing output electrical signals synchronizing the operation of an external device with the operation of the electronic device or circuitry.
Claim 17
Dependent Claim
21 words
The system as recited in claim 1, wherein the system includes circuit reconfiguration means for reconfiguring predetermined circuitry of the system.
Claim 18
Dependent Claim
41 words
The system as recited in claim 16, wherein the circuit reconfiguration means comprises an area of the system that includes lines carrying electrical signals between the hardware modeler and electrical devices or circuitry coming to the surface of a system substrate.
Claim 19
Dependent Claim
33 words
The system as recited in claim 1, wherein the system includes means for providing analog electrical signals from the electronic device or circuitry to verify proper operation of the electronic device or circuitry.
Claim 20
Independent Claim
373 words
A method of connecting electrical connection sites of a electronic device or circuitry connection matrix of a system that is used for connecting the electronic device or circuitry to a powered hardware modeler that is capable of evaluating the performance of the electronic device or circuitry in response to stimuli provided by the modeler, comprising the steps of: (a) determining for a class of electronic devices or circuitry a connector pattern of a electronic device or circuitry with a largest outside connector pattern dimension of the class and matrix positions that correspond to a connector pattern of the electronic device or circuitry with the largest outside connector pattern dimension of the class; (b) connecting each of the matrix position that corresponds to the connector pattern of the electronic device or circuitry with the largest outside connector pattern dimension of the class to signal pins of a system connector; (c) determining for the class of electronic devices or circuitry the connector pattern of the electronic device or circuitry that has the next largest outside connector pattern dimension and matrix positions that correspond to next largest outside connector pattern dimension of the class; (d) comparing an inside connector pattern dimension of the electronic device or circuitry with the next largest outside connector pattern dimension with an inside connector pattern dimension of the electronic device or circuitry with the prior largest outside connector pattern dimension; (e) connecting matrix positions at the inside connector pattern dimension of the electronic device or circuitry with the next largest outside connector pattern dimension that are not corresponding to the matrix positions of the connector pattern of the electronic device or circuitry with the prior largest outside connector pattern dimension to the matrix positions previously used by the connector pattern of the electronic device or circuitry with the prior largest outside connector pattern dimension that are outside the largest outside connector pattern dimension of the electronic device or circuitry of the class with the next largest outside connector pattern dimension; and (f) repeating steps (c), (d), and (e) until all of matrix positions bounded by the matrix positions at the outside connector pattern dimension of the connector pattern of the electronic device or circuitry with the largest outside connector pattern dimension.
Claim 21
Independent Claim
373 words
A method of connecting electrical connection sites of a electronic device or circuitry connection matrix of a system that is used for connecting the electronic device or circuitry to a powered hardware modeler that is capable of evaluating the performance of the electronic device or circuitry in response to stimuli provided by the modeler, comprising the steps of: (a) determining for a class of electronic devices or circuitry a connector pattern of a electronic device or circuitry with a largest outside connector pattern dimension of the class and matrix positions that correspond to a connector pattern of the electronic device or circuitry with the largest outside connector pattern dimension of the class; (b) connecting each of the matrix position that corresponds to the connector pattern of the electronic device or circuitry with the largest outside connector pattern dimension of the class to signal pins of a system connector; (c) determining for the class of electronic devices or circuitry the connector pattern of the electronic device or circuitry that has the next largest outside connector pattern dimension and matrix positions that correspond to next largest outside connector pattern dimension of the class; (d) comparing an inside connector pattern dimension of the electronic device or circuitry with the next largest outside connector pattern dimension with an inside connector pattern dimension of the electronic device or circuitry with the prior largest outside connector pattern dimension; (e) connecting matrix positions at the inside connector pattern dimension of the electronic device or circuitry with the next largest outside connector pattern dimension that are not corresponding to the matrix positions of the connector pattern of the electronic device or circuitry with the prior largest outside connector pattern dimension to the matrix positions previously used by the connector pattern of the electronic device or circuitry with the prior largest outside connector pattern dimension that are outside the largest outside connector pattern dimension of the electronic device or circuitry of the class with the next largest outside connector pattern dimension; and (f) repeating steps (c), (d), and (e) until all of matrix positions bounded by the matrix positions at the outside connector pattern dimension of the connector pattern of the electronic device or circuitry with the largest outside connector pattern dimension.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-11-28 | 1998-05-30 | 1998-11-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-11-28 | 2002-05-30 | 2002-11-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-11-28 | 2006-05-30 | 2006-11-29 | $7700.00 | Window Closed / Lapsed |