Patent US6080596A successfully refreshed from Google Patents.
US6080596A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method for forming vertical interconnect process for silicon segments with dielectric isolation
Assignee: VERTICAL CIRCUITS SOLUTIONS Inc
•
Filing: 1997-08-22
•
Granted: 2000-06-27
•
Expires: 2017-08-22
Abstract
Abstract A method for vertically interconnecting stacks of silicon segments. Each segment includes a plurality of adjacent die on a semiconductor wafer. The plurality of die on a segment are interconnected on the segment using one or more layers of metal interconnects which extend to all four sides of the segment to provide edge bonding pads for external electrical connection points. After the die are interconnected, each segment is cut from the backside of the wafer using a bevel cut to provide four inwardly sloping edge walls on each of the segments. After the segments are cut from the wafer, the segments are placed on top of one another to form a stack. Vertically adjacent segments in the stack are electrically interconnected by applying electrically conductive epoxy to one or more sides of the stack. The inwardly sloping edge walls of each of the segments in the stack provide a recess which allows the electrically conductive epoxy to access the edge bonding pads and lateral circuits on each of the segments once the segments are stacked. A dielectric coating is applied to the die to provide a conformal coating to protect and insulate the die and a laser is used to ablate the area over the bond pads to remove the dielectric coating in order to provide for electrical connections to the bond pads.
Inventors
- 👤 Alfons Vindasius
- 👤 Kenneth M. Sautter
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 11:23
CPC Classifications
H; H10; H10W; H10W40/00; H10W40/20; H10W40/25; H10W40/251; H01; H01R; H01R29/00; H01R4/00; H01R4/04; H05; H05K; H05K3/00; H05K3/30; H05K3/303; H05K3/305; H05K3/32; H05K3/321; H05K7/00; H05K7/02; H05K7/023; H10D; H10D62/00; H10D62/10; H10D62/117; H10W20/00; H10W20/40; H10W20/41; H10W20/44; H10W20/4473; H10W20/482; H10W20/484; H10W20/49; H10W20/493; H10W70/00; H10W70/60; H10W70/611; H10W70/62; H10W70/641; H10W72/00; H10W72/20; H10W90/00; H10W90/401; H05K2201/00; H05K2201/09; H05K2201/09209; H05K2201/09372; H05K2201/09472; H05K2201/10; H05K2201/10431; H05K2201/10439; H05K2201/10477; H05K2201/10613; H05K2201/10621; H05K2201/10674; H05K2201/10719; H05K2201/10727; H10W46/00; H10W72/01; H10W72/071; H10W72/0711; H10W72/07141; H10W72/072; H10W72/07231; H10W72/07236; H10W72/073; H10W72/07331; H10W72/251; H10W72/30; H10W72/321; H10W72/325; H10W72/351; H10W72/353; H10W72/354; H10W72/834; H10W90/20; H10W90/22; H10W90/284; H10W90/701; H10W90/721; H10W90/722; H10W90/731; H10W90/732; H10W90/751; H10W90/754; Y; Y02; Y02P; Y02P70/00; Y02P70/50
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
186 words
A method of forming a segment of silicon having a plurality of edges defining said segment, the method comprising the steps of: providing one or more die on said segment, each of said die including a plurality of first bond pads; locating a plurality of edge bond pads located on more than one of said edges of said segment for external electrical connections; connecting one or more layers of metal traces between said plurality of first bond pads to interconnect said die, said metal traces further connected between said plurality of edge bond pads and said plurality of first bond pads to connect said die to said external connections, forming a conformal dielectric coating around the edge of said die and over said bond pads; making openings in the conformal coating at selected locations to form openings for making electrical connections to said bond pads; and wherein said segment further includes a front side and a backside, and wherein said plurality of first bond pads, said plurality of edge bond pads, and said layer of metal traces are located on said front side of said segment.
Claim 2
Independent Claim
186 words
A method of forming a segment of silicon having a plurality of edges defining said segment, the method comprising the steps of: providing one or more die on said segment, each of said die including a plurality of first bond pads; locating a plurality of edge bond pads located on more than one of said edges of said segment for external electrical connections; connecting one or more layers of metal traces between said plurality of first bond pads to interconnect said die, said metal traces further connected between said plurality of edge bond pads and said plurality of first bond pads to connect said die to said external connections, forming a conformal dielectric coating around the edge of said die and over said bond pads; making openings in the conformal coating at selected locations to form openings for making electrical connections to said bond pads; and wherein said segment further includes a front side and a backside, and wherein said plurality of first bond pads, said plurality of edge bond pads, and said layer of metal traces are located on said front side of said segment.
Claim 3
Dependent Claim
17 words
The method as in claim 1 including the step of using a laser to form said openings.
Claim 4
Dependent Claim
34 words
The method as in claim 1 wherein said edges defining said segment further include edge walls, and wherein said edge walls and said backside of said segment are insulated with said conformal dielectric coating.
Claim 5
Dependent Claim
12 words
The method as in claim 3 wherein said edge walls are beveled.
Claim 6
Independent Claim
201 words
A method of forming a stack of electrical circuitry, the method comprising the steps of: vertically placing a stack of segments on top of one another, each of said segments including a plurality of die having circuitry therein, and electrically conductive contact points; interconnecting said plurality of die on each of said segments and connecting one or more of said plurality of die to one or more of said electrically conductive contact points on each of said segments; providing access to said electrically conductive contact points on each of said segments; electrically interconnecting said electrically conductive contact points on each of said segments in said stack, and providing a lateral electrical connection to said plurality of die located in each of said segments in said stack, forming a conformal dielectric coating around the edge of said die and over said bond pads; making openings in said conformal coating at selected locations for making electrical connections to said contact points; wherein said electrically conductive points are located along more than one of said edges on each of said segments; including more than one layer of metal traces; and wherein said layer of metal traces includes a sandwich of chrome titanium-tungsten, and gold.
Claim 7
Independent Claim
201 words
A method of forming a stack of electrical circuitry, the method comprising the steps of: vertically placing a stack of segments on top of one another, each of said segments including a plurality of die having circuitry therein, and electrically conductive contact points; interconnecting said plurality of die on each of said segments and connecting one or more of said plurality of die to one or more of said electrically conductive contact points on each of said segments; providing access to said electrically conductive contact points on each of said segments; electrically interconnecting said electrically conductive contact points on each of said segments in said stack, and providing a lateral electrical connection to said plurality of die located in each of said segments in said stack, forming a conformal dielectric coating around the edge of said die and over said bond pads; making openings in said conformal coating at selected locations for making electrical connections to said contact points; wherein said electrically conductive points are located along more than one of said edges on each of said segments; including more than one layer of metal traces; and wherein said layer of metal traces includes a sandwich of chrome titanium-tungsten, and gold.
Claim 8
Dependent Claim
17 words
The method as in claim 5 including the step of using a laser to make said openings.
Claim 9
Dependent Claim
19 words
The method as in claim 5 including inwardly sloping edge walls along each of said edges of said segments.
Claim 10
Dependent Claim
14 words
The method as in claim 7 wherein said interconnecting step includes electrically conductive epoxy.
Claim 11
Dependent Claim
43 words
The method as in claim 8 wherein each of said segments include control bond pads and wherein said segments are made unique with respect to one another by having a unique pattern formed onto said control bond pads on each of said segments.
Claim 12
Dependent Claim
50 words
The method as in claim 8 wherein said segments include interconnected functioning die and non-functioning die, and wherein said non-functioning die are disconnected from said functioning die, and said metal traces on each of said segments are routed so that particular ones of said functioning die replace said non-functioning die.
Claim 13
Dependent Claim
47 words
The method as in claim 9 wherein said stack includes at least two of said segments, each of said two segments includes at least one of said die, said stack having at least one vertical column of said die being of two of said die in height.
Claim 14
Dependent Claim
79 words
The method as in claim 11 wherein said stack includes six of said segments, each of said six segments includes four of said die, said stack having four vertical columns of said die, each of said vertical columns being six of said die in height, and wherein said electrically conductive epoxy is applied to said six segments such that four of said functioning die are connected in each of said four vertical columns of said die in said stack.
Claim 15
Dependent Claim
38 words
The method as in claim 12 wherein said stack includes between eight and twelve of said segments and each of said segments includes four vertical columns of die so as to form four stacks of eight functioning die.
Claim 16
Independent Claim
261 words
A method of forming a stack of segments, comprising the steps of: providing a wafer having a plurality of die; creating a plurality of segments, each one of said plurality of segments formed by grouping a plurality of adjacent ones of said die on said wafer; interconnecting said plurality of adjacent die on said each of said plurality of segments; separating said each one of said plurality of segments from said wafer; placing said plurality of segments on top of one another to create a stack of segments, said stack having external vertical sides; electrically interconnecting said stack of segments; forming a conformal dielectric coating around the edge of said die and over said bond pads; making openings on said conformal coating at selected locations for making electrical connections to said contact points, providing internal electrically conductive contact points on each of said plurality of die; providing external electrically conductive contact points on said each one of said plurality of segments; providing a layer of metal traces on said each one of said plurality of segments, said metal traces extending between said internal electrically conductive contact points on said plurality of die and said external electrically conductive contact points on said each one of said plurality of seaments; applying electrically conductive epoxy to more than one of said external vertical sides of said stack such that said electrically conductive epoxy is in contact with said external electrically conductive contact points on said each one of said segments in said stack, to thereby electrically interconnect said plurality of segments in said stack.
Claim 17
Independent Claim
261 words
A method of forming a stack of segments, comprising the steps of: providing a wafer having a plurality of die; creating a plurality of segments, each one of said plurality of segments formed by grouping a plurality of adjacent ones of said die on said wafer; interconnecting said plurality of adjacent die on said each of said plurality of segments; separating said each one of said plurality of segments from said wafer; placing said plurality of segments on top of one another to create a stack of segments, said stack having external vertical sides; electrically interconnecting said stack of segments; forming a conformal dielectric coating around the edge of said die and over said bond pads; making openings on said conformal coating at selected locations for making electrical connections to said contact points, providing internal electrically conductive contact points on each of said plurality of die; providing external electrically conductive contact points on said each one of said plurality of segments; providing a layer of metal traces on said each one of said plurality of segments, said metal traces extending between said internal electrically conductive contact points on said plurality of die and said external electrically conductive contact points on said each one of said plurality of seaments; applying electrically conductive epoxy to more than one of said external vertical sides of said stack such that said electrically conductive epoxy is in contact with said external electrically conductive contact points on said each one of said segments in said stack, to thereby electrically interconnect said plurality of segments in said stack.
Claim 18
Dependent Claim
17 words
A method as in claim 14 including the step of using a laser to make said openings.
Claim 19
Dependent Claim
70 words
A method for forming a stack of segments as in claim 15 further including the steps of: providing control bond pads on each of said segments; providing control signals to said stack from an external source for access to said segments in said stack; and making said control signals for each of said segments unique by burning a unique pattern into said control bond pads on each of said segments.
Claim 20
Dependent Claim
83 words
A method for forming a stack of segments as in claim 16 wherein said stack includes a top segment, said method further comprising the steps of: providing a signal carrying substrate having circuitry and a hole therein; affixing said stack of segments in said hole; and electrically connecting said stack of segments to said signal carrying substrate by applying traces of electrically conductive epoxy between said signal carrying substrate and said external electrically conductive contact points on said top segment of said stack.
Claim 21
Dependent Claim
26 words
A method for forming a stack of segments as in claim 17 wherein said top segment is co-planer with the surface of said signal carrying substrate.
Claim 22
Dependent Claim
30 words
A method for forming a stack of segments as in claim 18 wherein said traces of electrically conductive epoxy lie in substantially the same plane as said signal carrying substrate.
References Cited (Backward Citations)
US3702025A
Cited
US3679941A
Cited
US3691628A
Cited
US3769702A
Cited
US3813773A
Cited
US3999105A
Cited
US4300153A
Cited
EP0010657A1
Cited
US4646128A
Cited
EP0175870A2
Cited
US4426773A
Cited
US4525921A
Cited
WO1983004141A1
Cited
US4761681A
Cited
US4672737A
Cited
US4613891A
Cited
US4677528A
Cited
US4612083A
Cited
EP0178227A2
Cited
US4894706A
Cited
US4703170A
Cited
US4827327A
Cited
US4659931A
Cited
US4807021A
Cited
US4939568A
Cited
US4706166A
Cited
US4954875A
Cited
US4897708A
Cited
US4783695A
Cited
US4803595A
Cited
US4801992A
Cited
US4764846A
Cited
US4862249A
Cited
US5138438A
Cited
US4901136A
Cited
US5138437A
Cited
US4983533A
Cited
US5198888A
Cited
US5028986A
Cited
US5025306A
Cited
US4956694A
Cited
FR2638894A1
Cited
US4989063A
Cited
US4907128A
Cited
US5191405A
Cited
US4941033A
Cited
US4996583A
Cited
US4956746A
Cited
US5075253A
Cited
US4956695A
Cited
US5055425A
Cited
US5200300A
Cited
US5104820A
Cited
US5013687A
Cited
US5231304A
Cited
US4959749A
Cited
US5032896A
Cited
US5006923A
Cited
US5191404A
Cited
US5019943A
Cited
US5561591A
Cited
US5420751A
Cited
US5566051A
Cited
US5279029A
Cited
US5377077A
Cited
US5550711A
Cited
US5499160A
Cited
US5543664A
Cited
WO1992003035A1
Cited
US5475920A
Cited
US5446620A
Cited
US5093708A
Cited
US5146308A
Cited
US5117282A
Cited
US5172303A
Cited
EP0490739A1
Cited
US5229647A
Cited
US5111278A
Cited
US5135556A
Cited
US5283107A
Cited
WO1993000703A1
Cited
US5311401A
Cited
US5221642A
Cited
US5202754A
Cited
US5270261A
Cited
US5270571A
Cited
US5128831A
Cited
EP0558855A2
Cited
US5222014A
Cited
US5259110A
Cited
US5247423A
Cited
US5414637A
Cited
WO1994001887A1
Cited
US5330359A
Cited
US5479318A
Cited
US5493476A
Cited
US5455740A
Cited
US5552963A
Cited
US5688721A
Cited
US5445994A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-06-27 | 2003-12-27 | 2004-06-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-06-27 | 2007-12-27 | 2008-06-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-06-27 | 2011-12-27 | 2012-06-27 | $7700.00 | Window Closed / Lapsed |