US5414637A — Intra-module spare routing for high density elect…

Claim 1

Independent Claim 193 words

A method of fabricating a multichip module for a high density electronic package such that the module maintains a predetermined pattern of interconnect landings on an access surface thereof while accommodating the possible presence of a defective chip in the module, comprising the steps of: laminating together multiple chips, including a spare chip, to form a module; providing a set of chip circuitry connecting pads for each chip of the module at a first pad level of the module; testing the module to identify a defective chip in the module; providing a predetermined pattern of interconnect landings on an access surface of the module, each landing of said pattern being normally associated with a respective pad of a non-spare chip, and conductively connecting each landing to the respective pad normally associated therewith if said testing identifies no defective chip in the module; and if said testing identifies a defective chip in the module, forming a spare routing pattern on the module itself which electrically isolates a pad of the defective chip from the predetermined pattern of landings and electrically connects a corresponding pad of the spare chip to the predetermined pattern of landings.

Claim 2

Independent Claim 193 words

A method of fabricating a multichip module for a high density electronic package such that the module maintains a predetermined pattern of interconnect landings on an access surface thereof while accommodating the possible presence of a defective chip in the module, comprising the steps of: laminating together multiple chips, including a spare chip, to form a module; providing a set of chip circuitry connecting pads for each chip of the module at a first pad level of the module; testing the module to identify a defective chip in the module; providing a predetermined pattern of interconnect landings on an access surface of the module, each landing of said pattern being normally associated with a respective pad of a non-spare chip, and conductively connecting each landing to the respective pad normally associated therewith if said testing identifies no defective chip in the module; and if said testing identifies a defective chip in the module, forming a spare routing pattern on the module itself which electrically isolates a pad of the defective chip from the predetermined pattern of landings and electrically connects a corresponding pad of the spare chip to the predetermined pattern of landings.

Claim 3

Dependent Claim 36 words

The method of claim 1 wherein the step of forming the spare routing pattern comprises conductively connecting a landing normally associated with the pad of the defective chip to a corresponding pad of a non-defective chip.

Claim 4

Dependent Claim 13 words

The method of claim 2 wherein said non-defective chip comprises said spare chip.

Claim 5

Dependent Claim 50 words

The method of claim 2 wherein said non-defective chip comprises a non-spare chip; and the step of forming the spare routing pattern further comprises the step of conductively connecting the corresponding pad of the spare chip to a landing normally associated with a corresponding pad of a non-defective non-spare chip.

Claim 6

Dependent Claim 21 words

The method of claim 2 wherein corresponding pads of different chips are one of: (a) spatially aligned, and (b) functionally equivalent.

Claim 7

Dependent Claim 65 words

The method of claim 5 further comprising the step of providing insulation between the first pad level and the access surface of the module; and wherein the step of forming the spare routing pattern comprises conductively interconnecting the landing normally associated with the pad of the defective chip to the corresponding pad of a non-defective chip with a metal filled via extending through said insulation.

Claim 8

Dependent Claim 79 words

The method of claim 6 wherein said step of forming the spare routing pattern further comprises: providing a first lead at the first pad level extending from the corresponding pad of the non-defective chip to the vicinity of said pad of the defective chip; providing a first tab on the access surface extending from the landing normally associated with said pad of the defective chip; and interconnecting the first lead to the first tab with the metal filled via.

Claim 9

Dependent Claim 41 words

The method of claim 7 further comprising the steps of: forming the first lead integral with the corresponding pad of the non-defective chip; and forming the first tab integral with the landing normally associated with said pad of the defective chip.

Claim 10

Dependent Claim 59 words

The method of claim 8 further comprising the steps of: providing the corresponding pad of the non-defective chip with a second integral lead extending in an opposite direction to the first lead; and providing the landing normally associated with said pad of the defective chip with a second integral tab extending in an opposite direction to the first tab.

Claim 11

Dependent Claim 22 words

The method of claim 9 wherein said first and second leads are antisymmetrical; and said first and second tabs are reverse antisymmetrical.

Claim 12

Dependent Claim 73 words

The method of claim 5 wherein the step of forming the spare routing pattern comprises: selectively covering the pad of the defective chip with insulation; extending a lead from the corresponding pad of the spare chip to a site on top of said insulation covered pad; forming a new pad at said site; and conductively connecting the new pad to a landing normally associated with the insulation covered pad of the defective chip.

Claim 13

Dependent Claim 31 words

The method of claim 11 wherein said new pad is conductively connected with a metal filled via to the landing normally associated with said insulation covered pad of the defective chip.

Claim 14

Dependent Claim 43 words

The method of claim 11 wherein the landing normally associated with said insulation covered pad of the defective chip is formed directly atop the new pad; and further comprising the step of forming a solder bump atop said landing with a reflow dam.

Claim 15

Dependent Claim 16 words

The method of claim 13 wherein said reflow dam comprises one of chrome, polyimide, and glass.

Claim 16

Dependent Claim 20 words

The method of claim 14 wherein a plurality of solder bumps are formed atop said landing with said reflow dam.

Claim 17

Dependent Claim 64 words

The method of claim 6 wherein the step of forming the spare routing pattern further comprises extending a lead at the first pad level from the corresponding pad of the spare chip to the vicinity of said pad of the defective chip; and employing the metal filled via to interconnect the lead to the landing normally associated with the pad of the defective chip.

Claim 18

Dependent Claim 54 words

The method of claim 16 further comprising the steps of: providing a landing bus on the access surface of the module, said landing bus interconnecting landings normally associated with spatially aligned pads of non-spare chips; and extending the landing bus to a landing conductively connected to a spatially aligned pad of the spare chip.

Claim 19

Dependent Claim 27 words

The method of claim 17 further comprising the step of forming solder bumps atop only those bussed landings which are normally associated with pads of non-spare chips.

Claim 20

Dependent Claim 42 words

The method of claim 18 wherein said lead extends from the pad of the spare chip to the vicinity of a non-spatially aligned pad of the defective chip and crosses under an extended landing bus on the access surface of the module.

Claim 21

Dependent Claim 22 words

The method of claim 5 wherein said first pad level and said access surface are located on different faces of said module.

Claim 22

Dependent Claim 133 words

The method of claim 20 wherein the set of pads of each non-spare chip includes a pair of spaced apart associated pads, a first pad of said pair being conductively connected to circuitry of the chip, a second pad of the pair being conductively connected to a particular landing of said predetermined pattern, said first and second pads of the pair being normally interconnected; and wherein said step of forming a spare routing pattern comprises: electrically isolating a first pad of a pad pair of a defective chip; and conductively connecting the second pad of said pad pair of the defective chip to one of: (a) a first pad of a corresponding pad pair of a non-defective non-spare chip and (b) a corresponding pad of the spare chip, at the first pad level.

Claim 23

Dependent Claim 32 words

The method of claim 1 further comprising the step of determining the number of spare chips to be included in the module based on a binomial distribution and expected chip defect level.

Claim 24

Dependent Claim 54 words

The method of claim 22 wherein the number of spare chips included in the module is determined in accordance with the following equation: ##EQU2## where: n=Total number of chips in the module; m=Number of spare chips; n-m=Desired number of good chips in the module; and Pf=Average probability of chip failure in the module assembly.

Claim 25

Dependent Claim 26 words

The method of claim 1 wherein said testing step comprises testing the module at said first pad level to identify a defective chip in the module.

Claim 26

Dependent Claim 16 words

The method of claim 2 wherein said access surface comprises a side face of the module.

Claim 27

Dependent Claim 33 words

The method, of claim 2 further comprising the step of providing an end cap on an end of said module; and wherein said access surface comprises an end face of said end cap.

Claim 28

Dependent Claim 16 words

The method of claim 26 wherein said spare routing pattern is applied to said end cap.

Claim 29

Dependent Claim 48 words

The method of claim 27 further comprising the step of: forming the end cap from a material having a coefficient of expansion which substantially corresponds to a coefficient of expansion of a substrate to be bonded to the pattern of landings on the access surface of the module.

Claim 30

Dependent Claim 22 words

The method of claim 28 wherein the end cap is formed from a material comprising one of: ceramic material and organic material.

Claim 31

Dependent Claim 38 words

The method of claim 27 further comprising the step of including an active semiconductor layer in said end cap, said active semiconductor layer including a first integrated circuit device normally conductively connected to a chip of the module.

Claim 32

Dependent Claim 51 words

The method of claim 30 further comprising the steps of: providing a spare integrated circuit device in said active semiconductor layer; and conductively connecting the spare integrated circuit device to the chip normally connected to the first integrated circuit device, when testing indicates that the first integrated circuit device is defective.

Claim 33

Dependent Claim 43 words

The method of claim 27 wherein said first pad level is on the end cap of the module; and further comprising the step of providing a redundant set of circuitry connecting pads for each chip of the module at said first pad level.

Claim 34

Dependent Claim 44 words

The method of claim 32 further comprising the step of conductively connecting a pad of the redundant set to an interconnect landing when wiring extending from the pad normally associated with said landing to a chip of the module is found to be defective.

Claim 35

Dependent Claim 30 words

The method of claim 1 further comprising the step of bump bonding the interconnect landings of the module to complementary terminals of a fixed metal pattern on a supporting substrate.

Claim 36

Dependent Claim 13 words

An electronic package fabricated in accordance with the improved method of claim 34.

Claim 37

Dependent Claim 26 words

A module fabricated in accordance with the method of any one of claims 1, 2, 6, 7, 9, 11, 21, 27, 28, 30, 31 or 32.

Claim 38

Independent Claim 85 words

A method of repairing a multichip module containing at least one spare chip and having an access surface on which a predetermined pattern of interconnect landings is applied for conductive connection to complementary terminals of a substrate interconnect pattern, comprising the steps of: identifying a defective chip in the module; and forming a spare routing pattern on the module itself which electrically isolates the defective chip and electrically accesses the spare chip without altering the predetermined pattern of interconnect landings and the substrate interconnect pattern.

Claim 39

Independent Claim 85 words

A method of repairing a multichip module containing at least one spare chip and having an access surface on which a predetermined pattern of interconnect landings is applied for conductive connection to complementary terminals of a substrate interconnect pattern, comprising the steps of: identifying a defective chip in the module; and forming a spare routing pattern on the module itself which electrically isolates the defective chip and electrically accesses the spare chip without altering the predetermined pattern of interconnect landings and the substrate interconnect pattern.

Claim 40

Dependent Claim 51 words

The method of claim 37 wherein the step of forming a spare routing pattern comprises electrically isolating an electrical connection pad of the defective chip from the predetermined pattern of interconnect landings, and conductively connecting a corresponding electrical connection pad of the spare chip to the predetermined pattern of interconnect landings.

Claim 41

Dependent Claim 36 words

The method of claim 38 wherein the step of forming a spare routing pattern comprises conductively connecting a landing normally associated with the pad of the defective chip to a corresponding pad of a non-defective chip.

Claim 42

Dependent Claim 143 words

A multichip module for a high density electronic package comprising: a plurality of stacked laminated layers, each layer including one or more semiconductor chips, at least one chip being defective and at least one other chip being a spare; chip connection pads at a first level of said module for providing electrical connection to each chip of the module; a predetermined pattern of metal interconnect landings on an access surface of the module, each landing of the predetermined pattern being normally associated with a respective pad of a non-spare chip of the module; and spare routing means formed on said module itself, said spare routing means being between said chip connection pads and said predetermined pattern of metal interconnect landings for electrically substituting a non-defective chip for the defective chip and electrically connecting said spare to the predetermined pattern of metal interconnect landings.

Claim 43

Dependent Claim 143 words

A multichip module for a high density electronic package comprising: a plurality of stacked laminated layers, each layer including one or more semiconductor chips, at least one chip being defective and at least one other chip being a spare; chip connection pads at a first level of said module for providing electrical connection to each chip of the module; a predetermined pattern of metal interconnect landings on an access surface of the module, each landing of the predetermined pattern being normally associated with a respective pad of a non-spare chip of the module; and spare routing means formed on said module itself, said spare routing means being between said chip connection pads and said predetermined pattern of metal interconnect landings for electrically substituting a non-defective chip for the defective chip and electrically connecting said spare to the predetermined pattern of metal interconnect landings.

Claim 44

Dependent Claim 51 words

The module of claim 40 wherein said spare routing means comprises conductive connecting means for connecting a landing normally associated with a pad of the defective chip to a corresponding pad of a non-defective chip, and connecting a corresponding pad of the spare chip to a landing in said predetermined pattern.

Claim 45

Dependent Claim 77 words

The module of claim 41 wherein said conductive connecting means comprises: a lead at the first level extending from the corresponding pad of the non-defective chip to a terminus in the vicinity of the pad of the defective chip; insulation over said first level; and a metal filled via in said insulation above the terminus off the lead, said metal filled via being conductively connected to the landing normally associated with the pad of the defective chip.

Claim 46

Dependent Claim 39 words

The module of claim 41 in combination with a supporting substrate having a fixed interconnect pattern; and means for conductively connecting the interconnect landings of the module to complementary terminals of the fixed interconnect pattern of the supporting substrate.

Claim 47

Dependent Claim 105 words

The module of claim 41 wherein the first level and the access surface are on different faces of the module; and wherein each non-spare chip is provided with a pair of spaced apart associated pads, a first pad of the pad pair being conductively connected to circuitry of the chip, and a second pad of the pad pair being conductively connected to a landing normally associated with the first pad of the pad pair; and wherein said conductive connecting means connects a second pad of a pad pair of the defective chip to a first pad of a corresponding pad pair of a non-defective chip.

Claim 48

Dependent Claim 35 words

The module of claim 41 further comprising an end cap laminated to an end of said plurality of stacked laminated layers, an end face of said end cap comprising the access surface of the module.

Claim 49

Dependent Claim 14 words

The module of claim 45 wherein said end cap comprises an active semiconductor layer.

Claim 50

Dependent Claim 42 words

The module of claim 45 wherein said end cap comprises a material having a coefficient of expansion substantially corresponding to a coefficient of expansion of a substrate to be bonded to the pattern of landings on the access surface of the module.

Claim 51

Dependent Claim 23 words

The module of claim 45 further comprising a redundant set of chip connection pads for providing electrical connection to chips of the module.

Claim 52

Dependent Claim 122 words

A multichip module for a high density electronic package comprising: a plurality of laminated semiconductor chips; an end cap laminated to an end of said plurality of laminated chips, said end cap including an active semiconductor layer and an access surface; a plurality of integrated circuit devices formed in said active semiconductor layer, at least one of said devices comprising a spare device; a plurality of landings on the access surface, each landing being normally associated with a respective non-spare device; and spare routing means formed on said module itself, said spare routing means being between said active semiconductor layer and said access surface for conductively connecting a landing to the spare device when a non-spare device is found to be defective.

Claim 53

Dependent Claim 122 words

A multichip module for a high density electronic package comprising: a plurality of laminated semiconductor chips; an end cap laminated to an end of said plurality of laminated chips, said end cap including an active semiconductor layer and an access surface; a plurality of integrated circuit devices formed in said active semiconductor layer, at least one of said devices comprising a spare device; a plurality of landings on the access surface, each landing being normally associated with a respective non-spare device; and spare routing means formed on said module itself, said spare routing means being between said active semiconductor layer and said access surface for conductively connecting a landing to the spare device when a non-spare device is found to be defective.

Claim 54

Dependent Claim 122 words

A multichip module for a high density electronic package comprising: a plurality of laminated semiconductor chips; an end cap laminated to an end of the plurality of laminated chips; a first array of chip connection pads on said end cap, the pads of said first array being conductively connected to individual chips of said module; a second array of chip connection pads on said end cap, the pads of said second array being conductively connected to the same individual chips of the module as the pads of the first array such that the second array provides redundant chip connections; and means for selectively conductively connecting pads of said first and second arrays to landings on an access surface of the end cap.

Claim 55

Dependent Claim 122 words

A multichip module for a high density electronic package comprising: a plurality of laminated semiconductor chips; an end cap laminated to an end of the plurality of laminated chips; a first array of chip connection pads on said end cap, the pads of said first array being conductively connected to individual chips of said module; a second array of chip connection pads on said end cap, the pads of said second array being conductively connected to the same individual chips of the module as the pads of the first array such that the second array provides redundant chip connections; and means for selectively conductively connecting pads of said first and second arrays to landings on an access surface of the end cap.

Claim 56

Dependent Claim 49 words

The module of claim 50 wherein the pads of said first array are conductively connected to individual chips along a first side surface of the module and wherein the pads of the second array are conductively connected to the individual chips along a second side surface of the module.

Claim 57

Dependent Claim 63 words

A multichip module for a high density electronic package comprising: a plurality of laminated semiconductor chips; an end cap laminated to an end of said plurality of laminated chips, said end cap including an active semiconductor layer having an integrated circuit device formed therein; and electrical connection means for connecting a chip of said module to external circuitry through said integrated circuit device.

Claim 58

Dependent Claim 63 words

A multichip module for a high density electronic package comprising: a plurality of laminated semiconductor chips; an end cap laminated to an end of said plurality of laminated chips, said end cap including an active semiconductor layer having an integrated circuit device formed therein; and electrical connection means for connecting a chip of said module to external circuitry through said integrated circuit device.

Claim 59

Dependent Claim 26 words

The module of claim 52 wherein said integrated circuit device comprises means for processing one of an input signal and an output signal of a chip.

Claim 60

Dependent Claim 24 words

The module of claim 53 wherein the signal processing means comprises one of: an output driver, an input receiver, and error correction code circuitry.

Claim 61

Dependent Claim 69 words

The module of claim 53 further comprising: a plurality of chip connection landings on an access surface of said module, said chip connection landings being conductively connected to chips of said module; a device connection landing on the access surface of the module, said device connecting landing being conductively connected to said integrated circuit device; and means for conductively connecting the device connecting landing to a chip connecting landing.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	1998-05-08	1998-11-07	1999-05-09	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	2002-05-08	2002-11-07	2003-05-09	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	2006-05-08	2006-11-07	2007-05-09	$7700.00	Window Closed / Lapsed

Intra-module spare routing for high density electronic packages

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