EP0268111A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Interposer chip technique for making engineering changes between interconnected semiconductor chips
Assignee: International Business Machines Corp
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Filing: 1987-10-27
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Granted: —
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Expires: 2007-10-27
Abstract
Abstract Engineering changes in the wiring between semiconductor device (2) supported on the same substrate (3) are made using minimum substrate real estate and without the use of engineering change pads or discrete wires by the use of easily modified chip interposers (1). The interposers are inserted between respective chips and the substrate. The interposers comprise conductive vias and multiple internal wiring planes which are selectively connected to the vias.
Inventors
- 👤 Charles John Kraus
- 👤 Leon Li-Heng Wu
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-02 16:41
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/60; H10W70/611; H10W44/00; H10W44/601; H10W70/62; H10W70/641; H10W90/00; H10W90/401; H10W72/00; H10W72/071; H10W72/072; H10W72/07251; H10W72/20
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
119 words
A structure for making engineering changes to the wiring network between chips and a common substrate, the structure comprising: an interposer located between each said chip and said substrate, each interposer having conductive vias and stacked internal multiple wiring planes insulated from each other and from said vias, said vias making electrical connections between said chips and said substrate, whereby said chips are connected to each other and to said substrate via said interposers, and means for making connections between selected ones of said vias and said wiring planes on at least some of said interposers whereby the electrical connections between said chips are changeable in accordance with changes in the connections between said vias and said wiring planes.
Claim 2
Dependent Claim
119 words
A structure for making engineering changes to the wiring network between chips and a common substrate, the structure comprising: an interposer located between each said chip and said substrate, each interposer having conductive vias and stacked internal multiple wiring planes insulated from each other and from said vias, said vias making electrical connections between said chips and said substrate, whereby said chips are connected to each other and to said substrate via said interposers, and means for making connections between selected ones of said vias and said wiring planes on at least some of said interposers whereby the electrical connections between said chips are changeable in accordance with changes in the connections between said vias and said wiring planes.
Claim 3
Dependent Claim
27 words
The structure set forth in claim 1 and further including: an additional conductive via on a selected interposer for making electrical connection between two of said planes.
Claim 4
Dependent Claim
22 words
The structure set forth in claim 1 or 2 wherein said planes include planes having spaced paralleled conductors running in orthogonal directions.
Claim 5
Dependent Claim
47 words
The structure set forth in claim 3 and further including a conductive via extending between and connecting a first plane having spaced paralleled conductors running in a first direction and a second plane having spaced paralleled conductors running in a second direction perpendicular to said first direction.
Claim 6
Dependent Claim
24 words
The structure set forth in anyone of the preceding claims wherein at least one of said conductive vias extends only partially through said interposer.
Claim 7
Dependent Claim
28 words
The structure set forth in claim 5 and further including means for electrically connecting one of said wiring planes to said at least one of said conductive vias.
Claim 8
Dependent Claim
24 words
The structure set forth in anyone of the preceding claims wherein a respective interposer is located between each of said chips and said substrate.
Claim 9
Dependent Claim
21 words
The set forth in anyone of the preceding claims and further including a capacitor mounted on said interposer adjacent said ship.
Claim 10
Independent Claim
90 words
The method of making engineering changes to the writing network between chips and a substrate, the method comprising : providing an interposer having conductive vias and stacked internal multiple wiring planes selectively connected to each other and to the substrate via the interposers, and making the connections on each interposer between selected ones of the conductive vias and the multiple wiring planes thereby making the connections between the chips and substrate whereby the wiring network is changeable solely by changing some of the interposers and the selective connections provided thereby.
Claim 11
Independent Claim
90 words
The method of making engineering changes to the writing network between chips and a substrate, the method comprising : providing an interposer having conductive vias and stacked internal multiple wiring planes selectively connected to each other and to the substrate via the interposers, and making the connections on each interposer between selected ones of the conductive vias and the multiple wiring planes thereby making the connections between the chips and substrate whereby the wiring network is changeable solely by changing some of the interposers and the selective connections provided thereby.
References Cited (Backward Citations)
No citation records indexed.
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