US6867085B2 — Insulated gate semiconductor device and method of…

Claim 1

Independent Claim 217 words

A method of manufacturing an insulated gate semiconductor device, said method comprising: forming a resist over a crystal semiconductor comprising a part to become a channel forming region; forming a dotted hole in said resist by patterning said resist using electron drawing method or FIB method; forming an intrinsic or substantially intrinsic region and impurity regions in said part to become the channel forming region by introducing a first impurity into said channel forming region through said resist having said dotted hole, said first impurity being selected from the group consisting of carbon, nitrogen and oxygen; and introducing into said crystal semiconductor a second impurity that gives one conductivity to form a source region and a drain region in said crystal semiconductor with said channel forming region therebetween, wherein said impurity regions have total width of Wpi in a direction of a channel width W, and a total width of said intrinsic or substantially intrinsic region is Wpa in said direction of said channel width W, where Wpi/W=0.1 to 0.9 and Wpa/W=0.1 to 0.9, and wherein said source region and said drain region and said channel forming region are provided in a transistor of at least one selected from the group consisting of an arithmetic operating section, a memory section, a DRAM circuit and an SRAM circuit.

Claim 2

Independent Claim 217 words

A method of manufacturing an insulated gate semiconductor device, said method comprising: forming a resist over a crystal semiconductor comprising a part to become a channel forming region; forming a dotted hole in said resist by patterning said resist using electron drawing method or FIB method; forming an intrinsic or substantially intrinsic region and impurity regions in said part to become the channel forming region by introducing a first impurity into said channel forming region through said resist having said dotted hole, said first impurity being selected from the group consisting of carbon, nitrogen and oxygen; and introducing into said crystal semiconductor a second impurity that gives one conductivity to form a source region and a drain region in said crystal semiconductor with said channel forming region therebetween, wherein said impurity regions have total width of Wpi in a direction of a channel width W, and a total width of said intrinsic or substantially intrinsic region is Wpa in said direction of said channel width W, where Wpi/W=0.1 to 0.9 and Wpa/W=0.1 to 0.9, and wherein said source region and said drain region and said channel forming region are provided in a transistor of at least one selected from the group consisting of an arithmetic operating section, a memory section, a DRAM circuit and an SRAM circuit.

Claim 3

Dependent Claim 56 words

A method as claimed in claim 1 further comprising the steps of: forming a gate insulating film over said part to become the channel forming region after the step of forming said plurality of impurity regions; and forming a gate electrode over said part to become the channel forming region with said gate insulating film therebetween.

Claim 4

Independent Claim 96 words

A method of manufacturing an insulated gate semiconductor device, said method comprising the steps of: locally conducting an anisotropic etching on a surface of a substrate comprising silicon to draw a groove-like or hole-like pattern in a part of said substrate to become a channel forming region: adding said surface of said substrate with an impurity selected from the group consisting of carbon, nitrogen and oxygen; embedding said groove-like or hole-like pattern with thermal oxide by conducting a heat treatment on said substrate after the adding step to make said impurity segregated in said thermal oxide.

Claim 5

Independent Claim 96 words

A method of manufacturing an insulated gate semiconductor device, said method comprising the steps of: locally conducting an anisotropic etching on a surface of a substrate comprising silicon to draw a groove-like or hole-like pattern in a part of said substrate to become a channel forming region: adding said surface of said substrate with an impurity selected from the group consisting of carbon, nitrogen and oxygen; embedding said groove-like or hole-like pattern with thermal oxide by conducting a heat treatment on said substrate after the adding step to make said impurity segregated in said thermal oxide.

Claim 6

Dependent Claim 21 words

A method as claimed in claim 3 wherein said heat treatment is conducted at a temperature of 1000 to 1200° C.

Claim 7

Independent Claim 109 words

A method of manufacturing an insulated gate semiconductor device, said method comprising the steps of: locally conducting an anisotropic etching on a surface of a substrate comprising silicon and containing boron to draw a groove-like or hole-like pattern in a part of said substrate to become a channel forming region; adding said surface of said substrate with an impurity selected from the group consisting of carbon, nitrogen and oxygen; embedding said groove-like or hole-like pattern with thermal oxide by conducting a heat treatment on said substrate after the adding step to make said impurity segregated in said thermal oxide and to make said boron segregated in said thermal oxide.

Claim 8

Independent Claim 109 words

A method of manufacturing an insulated gate semiconductor device, said method comprising the steps of: locally conducting an anisotropic etching on a surface of a substrate comprising silicon and containing boron to draw a groove-like or hole-like pattern in a part of said substrate to become a channel forming region; adding said surface of said substrate with an impurity selected from the group consisting of carbon, nitrogen and oxygen; embedding said groove-like or hole-like pattern with thermal oxide by conducting a heat treatment on said substrate after the adding step to make said impurity segregated in said thermal oxide and to make said boron segregated in said thermal oxide.

Claim 9

Dependent Claim 21 words

A method as claimed in claim 5 wherein said heat treatment is conducted at a temperature of 1000 to 1200° C.

Claim 10

Independent Claim 156 words

A method of manufacturing an insulated gate semiconductor device, said method comprising: implanting an oxygen ion into a crystal semiconductor comprising a part to become a channel forming region by a convergent ion beam or an electron beam, said crystal semiconductor comprising silicon; forming an intrinsic or substantially intrinsic region and oxide regions in said part to become the channel forming region by thermally treating said crystal semiconductor comprising silicon at a temperature of 1000° C. or higher to change a region regions of said crystal semiconductor implanted with said oxygen ion by said implanting step into said oxide regions; and introducing into said crystal semiconductor an impurity that gives one conductivity to form a source region and a drain region in said crystal semiconductor with said channel forming region therebetween, and wherein said oxide regions form one or a plurality of rows extending in a direction of a channel length of said channel forming region.

Claim 11

Independent Claim 156 words

A method of manufacturing an insulated gate semiconductor device, said method comprising: implanting an oxygen ion into a crystal semiconductor comprising a part to become a channel forming region by a convergent ion beam or an electron beam, said crystal semiconductor comprising silicon; forming an intrinsic or substantially intrinsic region and oxide regions in said part to become the channel forming region by thermally treating said crystal semiconductor comprising silicon at a temperature of 1000° C. or higher to change a region regions of said crystal semiconductor implanted with said oxygen ion by said implanting step into said oxide regions; and introducing into said crystal semiconductor an impurity that gives one conductivity to form a source region and a drain region in said crystal semiconductor with said channel forming region therebetween, and wherein said oxide regions form one or a plurality of rows extending in a direction of a channel length of said channel forming region.

Claim 12

Dependent Claim 51 words

A method as claimed in claim 7 further comprising the steps of: forming a gate insulating film over said part to become the channel forming region after the thermally treating step; and forming a gate electrode over said part to become the channel forming region with said gate insulating film therebetween.

Claim 13

Independent Claim 168 words

A method of manufacturing an insulated gate semiconductor device, said method comprising: forming an intrinsic or substantially intrinsic region and impurity regions in a part of a crystal semiconductor to become a channel forming region by introducing a first impurity into said channel forming region, said impurity regions containing an element selected from the group consisting of carbon, nitrogen and oxygen as said first impurity; and introducing into said crystal semiconductor a second impurity that gives one conductivity to form a source region and a drain region in said crystal semiconductor with said channel forming region therebetween, wherein said impurity regions have total width of Wpi in a direction of a channel width W, and a total width of said intrinsic or substantially intrinsic region is Wpa in said direction of said channel width W, where Wpi/W=0.1 to 0.9 and Wpa/W=0.1 to 0.9, and wherein said impurity regions form one or a plurality of rows extending in a direction of a channel length of said channel forming region.

Claim 14

Independent Claim 168 words

A method of manufacturing an insulated gate semiconductor device, said method comprising: forming an intrinsic or substantially intrinsic region and impurity regions in a part of a crystal semiconductor to become a channel forming region by introducing a first impurity into said channel forming region, said impurity regions containing an element selected from the group consisting of carbon, nitrogen and oxygen as said first impurity; and introducing into said crystal semiconductor a second impurity that gives one conductivity to form a source region and a drain region in said crystal semiconductor with said channel forming region therebetween, wherein said impurity regions have total width of Wpi in a direction of a channel width W, and a total width of said intrinsic or substantially intrinsic region is Wpa in said direction of said channel width W, where Wpi/W=0.1 to 0.9 and Wpa/W=0.1 to 0.9, and wherein said impurity regions form one or a plurality of rows extending in a direction of a channel length of said channel forming region.

Claim 15

Dependent Claim 54 words

A method as claimed in claim 9 further comprising the steps of: forming a gate insulating film over said part to become the channel forming region after the step of introducing the first impurity; and forming a gate electrode over said part to become the channel forming region with said gate insulating film therebetween.

Claim 16

Independent Claim 127 words

A method of manufacturing an insulated gate semiconductor device, said method comprising the steps of: locally conducting an anisotropic etching on a surface of a substrate comprising silicon to draw a groove-like or hole-like pattern in a part of said substrate to become a channel forming region; adding said surface of said substrate with an impurity selected from the group consisting of carbon, nitrogen and oxygen; embedding said groove-like or hole-like pattern with thermal oxide by conducting a heat treatment on said substrate after the adding step to make said impurity segregated in said thermal oxide, wherein said impurity is added by said adding step to said substrate to a depth deeper than an etched depth formed in said groove-like or hole-like pattern by said anisotropic etching.

Claim 17

Independent Claim 127 words

A method of manufacturing an insulated gate semiconductor device, said method comprising the steps of: locally conducting an anisotropic etching on a surface of a substrate comprising silicon to draw a groove-like or hole-like pattern in a part of said substrate to become a channel forming region; adding said surface of said substrate with an impurity selected from the group consisting of carbon, nitrogen and oxygen; embedding said groove-like or hole-like pattern with thermal oxide by conducting a heat treatment on said substrate after the adding step to make said impurity segregated in said thermal oxide, wherein said impurity is added by said adding step to said substrate to a depth deeper than an etched depth formed in said groove-like or hole-like pattern by said anisotropic etching.

Claim 18

Dependent Claim 21 words

A method as claimed in claim 11 wherein said heat treatment is conducted at a temperature of 1000 to 1200° C.

Claim 19

Independent Claim 200 words

A method of manufacturing an insulated gate semiconductor device, said method comprising the steps of: forming an intrinsic or substantially intrinsic region and a plurality of impurity regions in a part of a crystal semiconductor to become a channel forming region by introducing a first impurity into said impurity regions, said plurality of impurity regions containing an element selected from the group consisting of carbon, nitrogen and oxygen as said first impurity; introducing into said crystal semiconductor a second impurity that gives one conductivity to form a source region and a drain region in said crystal semiconductor with said channel forming region therebetween, wherein said impurity regions alternate with said intrinsic or substantially intrinsic region in a direction of a channel width W of said channel forming region, and wherein said impurity regions have total width of Wpi in a direction of said channel width W, and a total width of said intrinsic or substantially intrinsic region is Wpa in said direction of said channel width W, where Wpi/W=0.1 to 0.9 and Wpa/W=0.1 to 0.9, and wherein said impurity regions form one or a plurality of rows extending in a direction of a channel length of said channel forming region.

Claim 20

Independent Claim 200 words

A method of manufacturing an insulated gate semiconductor device, said method comprising the steps of: forming an intrinsic or substantially intrinsic region and a plurality of impurity regions in a part of a crystal semiconductor to become a channel forming region by introducing a first impurity into said impurity regions, said plurality of impurity regions containing an element selected from the group consisting of carbon, nitrogen and oxygen as said first impurity; introducing into said crystal semiconductor a second impurity that gives one conductivity to form a source region and a drain region in said crystal semiconductor with said channel forming region therebetween, wherein said impurity regions alternate with said intrinsic or substantially intrinsic region in a direction of a channel width W of said channel forming region, and wherein said impurity regions have total width of Wpi in a direction of said channel width W, and a total width of said intrinsic or substantially intrinsic region is Wpa in said direction of said channel width W, where Wpi/W=0.1 to 0.9 and Wpa/W=0.1 to 0.9, and wherein said impurity regions form one or a plurality of rows extending in a direction of a channel length of said channel forming region.

Claim 21

Dependent Claim 54 words

A method as claimed in claim 13 further comprising the steps of: forming a gate insulating film over said part to become the channel forming region after the step of introducing the first impurity; and forming a gate electrode over said part to become the channel forming region with said gate insulating film therebetween.

Claim 22

Independent Claim 201 words

A method of manufacturing an insulated gate semiconductor device, said method comprising: forming a resist over a crystal semiconductor comprising a part to become a channel forming region; forming a dotted hole in said resist by patterning said resist using electron drawing method or FIB method; forming an intrinsic or substantially intrinsic region and a plurality of impurity regions in said part to become the channel forming region by introducing a first impurity into said impurity regions through said resist having said dotted hole, said first impurity being selected from the group consisting of carbon, nitrogen and oxygen; and introducing into said crystal semiconductor a second impurity that gives one conductivity to form a source region and a drain region in said crystal semiconductor with said channel forming region therebetween, wherein said impurity regions form one or a plurality of rows extending in a direction of a channel length of said channel forming region, and wherein said impurity regions have total width of Wpi in a direction of a channel width W, and a total width of said intrinsic or substantially intrinsic region is Wpa in said direction of said channel width W, where Wpi/W=0.1 to 0.9 and Wpa/W=0.1 to 0.9.

Claim 23

Independent Claim 201 words

A method of manufacturing an insulated gate semiconductor device, said method comprising: forming a resist over a crystal semiconductor comprising a part to become a channel forming region; forming a dotted hole in said resist by patterning said resist using electron drawing method or FIB method; forming an intrinsic or substantially intrinsic region and a plurality of impurity regions in said part to become the channel forming region by introducing a first impurity into said impurity regions through said resist having said dotted hole, said first impurity being selected from the group consisting of carbon, nitrogen and oxygen; and introducing into said crystal semiconductor a second impurity that gives one conductivity to form a source region and a drain region in said crystal semiconductor with said channel forming region therebetween, wherein said impurity regions form one or a plurality of rows extending in a direction of a channel length of said channel forming region, and wherein said impurity regions have total width of Wpi in a direction of a channel width W, and a total width of said intrinsic or substantially intrinsic region is Wpa in said direction of said channel width W, where Wpi/W=0.1 to 0.9 and Wpa/W=0.1 to 0.9.

Claim 24

Dependent Claim 56 words

A method as claimed in claim 15 further comprising the steps of: forming a gate insulating film over said part to become the channel forming region after the step of forming said plurality of impurity regions; and forming a gate electrode over said part to become the channel forming region with said gate insulating film therebetween.

Claim 25

Independent Claim 134 words

A method of manufacturing an insulated gate semiconductor device, said method comprising the steps of: locally conducting an anisotropic etching on a surface of a substrate comprising silicon to draw a groove-like or hole-like pattern in a part of said substrate to become a channel forming region; adding said surface of said substrate with an impurity selected from the group consisting of carbon, nitrogen and oxygen; embedding said groove-like or hole-like pattern with thermal oxide by conducting a heat treatment on said substrate after the adding step to make said impurity segregated in said thermal oxide, wherein said impurity segregated in said thermal oxide forms a plurality of impurity regions wherein said impurity regions form one or a plurality of rows extending in a direction of a channel length of said channel forming region.

Claim 26

Independent Claim 134 words

A method of manufacturing an insulated gate semiconductor device, said method comprising the steps of: locally conducting an anisotropic etching on a surface of a substrate comprising silicon to draw a groove-like or hole-like pattern in a part of said substrate to become a channel forming region; adding said surface of said substrate with an impurity selected from the group consisting of carbon, nitrogen and oxygen; embedding said groove-like or hole-like pattern with thermal oxide by conducting a heat treatment on said substrate after the adding step to make said impurity segregated in said thermal oxide, wherein said impurity segregated in said thermal oxide forms a plurality of impurity regions wherein said impurity regions form one or a plurality of rows extending in a direction of a channel length of said channel forming region.

Claim 27

Independent Claim 140 words

A method of manufacturing an insulated gate semiconductor device, said method comprising the steps of: forming a source region, a drain region and a channel forming region using a crystal semiconductor; forming an intrinsic or substantially intrinsic region and impurity regions in said channel forming region; and forming a gate insulating film and a gate electrode over said channel forming region, wherein said impurity regions formed in said channel forming region pins a depletion layer that expands from said drain region toward said channel forming region and said source region, and wherein a carrier moves through said intrinsic or substantially intrinsic region while said carrier avoids said impurity region formed in said channel forming region, and wherein said impurity regions form one or a plurality of rows extending in a direction of a channel length of said channel forming region.

Claim 28

Independent Claim 140 words

A method of manufacturing an insulated gate semiconductor device, said method comprising the steps of: forming a source region, a drain region and a channel forming region using a crystal semiconductor; forming an intrinsic or substantially intrinsic region and impurity regions in said channel forming region; and forming a gate insulating film and a gate electrode over said channel forming region, wherein said impurity regions formed in said channel forming region pins a depletion layer that expands from said drain region toward said channel forming region and said source region, and wherein a carrier moves through said intrinsic or substantially intrinsic region while said carrier avoids said impurity region formed in said channel forming region, and wherein said impurity regions form one or a plurality of rows extending in a direction of a channel length of said channel forming region.

Claim 29

Independent Claim 123 words

A method of manufacturing an insulated gate semiconductor device, said method comprising the steps of: forming a source region, a drain region and a channel forming region using a crystal semiconductor; forming an intrinsic or substantially intrinsic region and impurity regions in said channel forming region; forming a gate insulating film and a gate electrode over said channel forming region, wherein said impurity regions control the threshold voltage to a predetermined value voltage, and wherein a carrier moves through said intrinsic or substantially intrinsic region while said carrier avoids said impurity regions formed in said channel forming region, and wherein said impurity regions form one or a plurality of rows extending in a direction of a channel length of said channel forming region.

Claim 30

Independent Claim 123 words

A method of manufacturing an insulated gate semiconductor device, said method comprising the steps of: forming a source region, a drain region and a channel forming region using a crystal semiconductor; forming an intrinsic or substantially intrinsic region and impurity regions in said channel forming region; forming a gate insulating film and a gate electrode over said channel forming region, wherein said impurity regions control the threshold voltage to a predetermined value voltage, and wherein a carrier moves through said intrinsic or substantially intrinsic region while said carrier avoids said impurity regions formed in said channel forming region, and wherein said impurity regions form one or a plurality of rows extending in a direction of a channel length of said channel forming region.

Claim 31

Independent Claim 146 words

A method of manufacturing an insulated gate semiconductor device, said method comprising: forming a source region, a drain region and a channel forming region using a crystal semiconductor; adding impurity elements that expand an energy band width (Eg) to said channel forming region to form an intrinsic or substantially intrinsic region and an impurity regions in said channel forming region; and forming a gate insulating film and a gate electrode over said channel forming region, wherein said impurity regions have total width of Wpi in a direction of a channel width W, and a total width of said intrinsic or substantially intrinsic region is Wpa in said direction of said channel width W, where Wpi/W=0.1 to 0.9 and Wpa/W=0.1 to 0.9, and wherein said impurity regions form one or a plurality of rows extending in a direction of a channel length of said channel forming region.

Claim 32

Independent Claim 146 words

A method of manufacturing an insulated gate semiconductor device, said method comprising: forming a source region, a drain region and a channel forming region using a crystal semiconductor; adding impurity elements that expand an energy band width (Eg) to said channel forming region to form an intrinsic or substantially intrinsic region and an impurity regions in said channel forming region; and forming a gate insulating film and a gate electrode over said channel forming region, wherein said impurity regions have total width of Wpi in a direction of a channel width W, and a total width of said intrinsic or substantially intrinsic region is Wpa in said direction of said channel width W, where Wpi/W=0.1 to 0.9 and Wpa/W=0.1 to 0.9, and wherein said impurity regions form one or a plurality of rows extending in a direction of a channel length of said channel forming region.

Claim 33

Independent Claim 149 words

A method of manufacturing an insulated gate semiconductor device, said method comprising the steps of: forming a source region, a drain region and a channel forming region using a crystal semiconductor; adding impurity elements that expand an energy band width (Eg) to said channel forming region to form an intrinsic or substantially intrinsic region and impurity regions in said channel forming region; and forming a gate insulating film and a gate electrode over said channel forming region, wherein said impurity regions pin a depletion layer that expands from said drain region toward said channel forming region and said source region, wherein a carrier moves through said intrinsic or substantially intrinsic region while said carrier avoids said impurity regions formed in said channel forming region, and wherein said impurity regions form one or a plurality of rows extending in a direction of a channel length of said channel forming region.

Claim 34

Independent Claim 149 words

A method of manufacturing an insulated gate semiconductor device, said method comprising the steps of: forming a source region, a drain region and a channel forming region using a crystal semiconductor; adding impurity elements that expand an energy band width (Eg) to said channel forming region to form an intrinsic or substantially intrinsic region and impurity regions in said channel forming region; and forming a gate insulating film and a gate electrode over said channel forming region, wherein said impurity regions pin a depletion layer that expands from said drain region toward said channel forming region and said source region, wherein a carrier moves through said intrinsic or substantially intrinsic region while said carrier avoids said impurity regions formed in said channel forming region, and wherein said impurity regions form one or a plurality of rows extending in a direction of a channel length of said channel forming region.

Claim 35

Independent Claim 157 words

A method of manufacturing an insulated gate semiconductor device, said method comprising the steps of: forming a source region, a drain region and a channel forming region using a crystal semiconductor; adding impurity elements that expand an energy band width (Eg) to said channel forming region to form an intrinsic or substantially intrinsic region and impurity regions in said channel forming region; and forming a gate insulating film and a gate electrode over said channel forming region, wherein said impurity regions control the threshold voltage to a predetermined value voltage, wherein an impurity element that expand an energy band width (Eg) is added to said impurity region, and wherein a carrier moves through said intrinsic or substantially intrinsic region while said carrier avoids said impurity regions formed in said channel forming region, and wherein said impurity regions form one or a plurality of rows extending in a direction of a channel length of said channel forming region.

Claim 36

Independent Claim 157 words

A method of manufacturing an insulated gate semiconductor device, said method comprising the steps of: forming a source region, a drain region and a channel forming region using a crystal semiconductor; adding impurity elements that expand an energy band width (Eg) to said channel forming region to form an intrinsic or substantially intrinsic region and impurity regions in said channel forming region; and forming a gate insulating film and a gate electrode over said channel forming region, wherein said impurity regions control the threshold voltage to a predetermined value voltage, wherein an impurity element that expand an energy band width (Eg) is added to said impurity region, and wherein a carrier moves through said intrinsic or substantially intrinsic region while said carrier avoids said impurity regions formed in said channel forming region, and wherein said impurity regions form one or a plurality of rows extending in a direction of a channel length of said channel forming region.

Claim 37

Independent Claim 173 words

A method of manufacturing an insulated gate semiconductor device, said method comprising: forming a source region, a drain region and a channel forming region using a crystal semiconductor; and adding impurity elements that expand an energy band width (Eg) to said channel forming region to form an intrinsic or substantially intrinsic region and an impurity regions in said channel forming region; and forming a gate insulating film and a gate electrode over said channel forming region, wherein said impurity region has an insulating property, wherein an impurity element that expands an energy band width (Eg) is added to said impurity region, and wherein said impurity regions have total width of Wpi in a direction of a channel width W, and a total width of said intrinsic or substantially intrinsic region is Wpa in said direction of said channel width W, where Wpi/W=0.1 to 0.9 and Wpa/W=0.1 to 0.9, and wherein said impurity regions form one or a plurality of rows extending in a direction of a channel length of said channel forming region.

Claim 38

Independent Claim 173 words

A method of manufacturing an insulated gate semiconductor device, said method comprising: forming a source region, a drain region and a channel forming region using a crystal semiconductor; and adding impurity elements that expand an energy band width (Eg) to said channel forming region to form an intrinsic or substantially intrinsic region and an impurity regions in said channel forming region; and forming a gate insulating film and a gate electrode over said channel forming region, wherein said impurity region has an insulating property, wherein an impurity element that expands an energy band width (Eg) is added to said impurity region, and wherein said impurity regions have total width of Wpi in a direction of a channel width W, and a total width of said intrinsic or substantially intrinsic region is Wpa in said direction of said channel width W, where Wpi/W=0.1 to 0.9 and Wpa/W=0.1 to 0.9, and wherein said impurity regions form one or a plurality of rows extending in a direction of a channel length of said channel forming region.

Claim 39

Dependent Claim 69 words

A method of manufacturing an insulated gate semiconductor device as claimed in claim 18 , wherein assuming that a width of said channel forming region is W, a total width of said impurity regions is Wpi, and a total of intervals of said impurity regions is Wpa, respectively, relational expressions of Wpi/W=0.1 to 0.9, Wpa/W=0.1 to 0.9 and Wpi/Wpa={fraction (1/9)} to 9 are accomplished between W, Wpi and Wpa.

Claim 40

Dependent Claim 50 words

A method of manufacturing an insulated gate semiconductor device as claimed in claim 18 , wherein at least one section perpendicular to a channel direction of said channel forming region is substantially regarded as an assembly of a plurality of channel forming regions which are sectioned by said impurity regions.

Claim 41

Dependent Claim 28 words

A method of manufacturing an insulated gate semiconductor device as claimed in claim 18 , wherein said impurity regions are arranged at intervals of 100 to 3000 Å.

Claim 42

Dependent Claim 23 words

A method of manufacturing an insulated gate semiconductor device as claimed in claim 18 , wherein said crystal semiconductor is a monocrystal semiconductor.

Claim 43

Dependent Claim 24 words

A method of manufacturing an insulated gate semiconductor device as claimed in claim 18 , wherein said impurity regions are in a dot pattern.

Claim 44

Dependent Claim 62 words

A method as claimed in claim 19 , wherein assuming that a width of said channel forming region is W, a total width of said impurity regions is Wpi, and a total of intervals of said impurity regions is Wpa, respectively, relational expressions of Wpi/W=0.1 to 0.9, Wpa/W=0.1 to 0.9 and Wpi/Wpa={fraction (1/9)} to 9 are accomplished between W, Wpi and Wpa.

Claim 45

Dependent Claim 43 words

A method as claimed in claim 19 , wherein at least one section perpendicular to a channel direction of said channel forming region is substantially regarded as an assembly of a plurality of channel forming regions which are sectioned by said impurity regions.

Claim 46

Dependent Claim 21 words

A method as claimed in claim 19 , wherein said impurity regions are arranged at intervals of 100 to 3000 Å.

Claim 47

Dependent Claim 16 words

A method as claimed in claim 19 , wherein said crystal semiconductor is a monocrystal semiconductor.

Claim 48

Dependent Claim 17 words

A method as claimed in claim 19 , wherein said impurity regions are in a dot pattern.

Claim 49

Dependent Claim 31 words

A method as claimed in claim 19 , wherein impurity elements for forming said impurity regions are one or a plurality of kinds of elements selected from carbon, nitrogen and oxygen.

Claim 50

Dependent Claim 63 words

A method as claimed in claim 20 , wherein assuming that a width of said channel forming region is W, a total width of said impurity regions is Wpi, and a total of intervals of said impurity regions is Wpa, respectively, relational expressions of Wpi/W=0.1 to 0.9, Wpa/W =0.1 to 0.9 and Wpi/Wpa={fraction (1/9)} to 9 are accomplished between W, Wpi and Wpa.

Claim 51

Dependent Claim 43 words

A method as claimed in claim 20 , wherein at least one section perpendicular to a channel direction of said channel forming region is substantially regarded as an assembly of a plurality of channel forming regions which are sectioned by said impurity regions.

Claim 52

Dependent Claim 21 words

A method as claimed in claim 20 , wherein said impurity regions are arranged at intervals of 100 to 3000 Å.

Claim 53

Dependent Claim 16 words

A method as claimed in claim 20 , wherein said crystal semiconductor is a monocrystal semiconductor.

Claim 54

Dependent Claim 17 words

A method as claimed in claim 20 , wherein said impurity regions are in a dot pattern.

Claim 55

Dependent Claim 27 words

A method as claimed in claim 20 , wherein said impurity elements are one or a plurality of kinds of elements selected from carbon, nitrogen and oxygen.

Claim 56

Dependent Claim 62 words

A method as claimed in claim 21 , wherein assuming that a width of said channel forming region is W, a total width of said impurity regions is Wpi, and a total of intervals of said impurity regions is Wpa, respectively, relational expressions of Wpi/W=0.1 to 0.9, Wpa/W=0.1 to 0.9 and Wpi/Wpa={fraction (1/9)} to 9 are accomplished between W, Wpi and Wpa.

Claim 57

Dependent Claim 43 words

A method as claimed in claim 21 , wherein at least one section perpendicular to a channel direction of said channel forming region is substantially regarded as an assembly of a plurality of channel forming regions which are sectioned by said impurity regions.

Claim 58

Dependent Claim 21 words

A method as claimed in claim 21 , wherein said impurity regions are arranged at intervals of 100 to 3000 Å.

Claim 59

Dependent Claim 16 words

A method as claimed in claim 21 , wherein said crystal semiconductor is a monocrystal semiconductor.

Claim 60

Dependent Claim 17 words

A method as claimed in claim 21 , wherein said impurity regions are in a dot pattern.

Claim 61

Dependent Claim 27 words

A method as claimed in claim 21 , wherein said impurity elements are one or a plurality of kinds of elements selected from carbon, nitrogen and oxygen.

Claim 62

Dependent Claim 28 words

A method as claimed in claim 22 , wherein a region other than said impurity regions within said channel forming region is an intrinsic or substantially intrinsic region.

Claim 63

Dependent Claim 62 words

A method as claimed in claim 22 , wherein assuming that a width of said channel forming region is W, a total width of said impurity regions is Wpi, and a total of intervals of said impurity regions is Wpa, respectively, relational expressions of Wpi/W=0.1 to 0.9, Wpa/W=0.1 to 0.9 and Wpi/Wpa={fraction (1/9)} to 9 are accomplished between W, Wpi and Wpa.

Claim 64

Dependent Claim 43 words

A method as claimed in claim 22 , wherein at least one section perpendicular to a channel direction of said channel forming region is substantially regarded as an assembly of a plurality of channel forming regions which are sectioned by said impurity regions.

Claim 65

Dependent Claim 21 words

A method as claimed in claim 22 , wherein said impurity regions are arranged at intervals of 100 to 3000 Å.

Claim 66

Dependent Claim 16 words

A method as claimed in claim 22 , wherein said crystal semiconductor is a monocrystal semiconductor.

Claim 67

Dependent Claim 17 words

A method as claimed in claim 22 , wherein said impurity regions are in a dot pattern.

Claim 68

Dependent Claim 27 words

A method as claimed in claim 22 , wherein said impurity elements are one or a plurality of kinds of elements selected from carbon, nitrogen and oxygen.

Claim 69

Dependent Claim 62 words

A method as claimed in claim 23 , wherein assuming that a width of said channel forming region is W, a total width of said impurity regions is Wpi, and a total of intervals of said impurity regions is Wpa, respectively, relational expressions of Wpi/W=0.1 to 0.9, Wpa/W=0.1 to 0.9 and Wpi/Wpa={fraction (1/9)} to 9 are accomplished between W, Wpi and Wpa.

Claim 70

Dependent Claim 43 words

A method as claimed in claim 23 , wherein at least one section perpendicular to a channel direction of said channel forming region is substantially regarded as an assembly of a plurality of channel forming regions which are sectioned by said impurity regions.

Claim 71

Dependent Claim 21 words

A method as claimed in claim 23 , wherein said impurity regions are arranged at intervals of 100 to 3000 Å.

Claim 72

Dependent Claim 16 words

A method as claimed in claim 23 , wherein said crystal semiconductor is a monocrystal semiconductor.

Claim 73

Dependent Claim 17 words

A method as claimed in claim 23 , wherein said impurity regions are in a dot pattern.

Claim 74

Dependent Claim 27 words

A method as claimed in claim 23 , wherein said impurity elements are one or a plurality of kinds of elements selected from carbon, nitrogen and oxygen.

Claim 75

Dependent Claim 21 words

A method as claimed in claim 17 wherein said heat treatment is conducted at a temperature of 1000 to 1200° C.

Claim 76

Independent Claim 147 words

A method of manufacturing an insulated gate semiconductor device, said method comprising the steps of: locally conducting an anisotropic etching on a surface of a substrate comprising silicon and containing boron to draw a groove-like or hole-like pattern in a part of said substrate to become a channel forming region; adding said surface of said substrate with an impurity selected from the group consisting of carbon, nitrogen and oxygen; embedding said groove-like or hole-like pattern with thermal oxide by conducting a heat treatment on said substrate after the adding step to make said impurity segregated in said thermal oxide and to make said boron segregated in said thermal oxide, wherein said impurity segregated in said thermal oxide forms a plurality of impurity regions wherein said impurity region form one or a plurality of row extending in a direction of a channel length of said channel forming region.

Claim 77

Independent Claim 147 words

A method of manufacturing an insulated gate semiconductor device, said method comprising the steps of: locally conducting an anisotropic etching on a surface of a substrate comprising silicon and containing boron to draw a groove-like or hole-like pattern in a part of said substrate to become a channel forming region; adding said surface of said substrate with an impurity selected from the group consisting of carbon, nitrogen and oxygen; embedding said groove-like or hole-like pattern with thermal oxide by conducting a heat treatment on said substrate after the adding step to make said impurity segregated in said thermal oxide and to make said boron segregated in said thermal oxide, wherein said impurity segregated in said thermal oxide forms a plurality of impurity regions wherein said impurity region form one or a plurality of row extending in a direction of a channel length of said channel forming region.

Claim 78

Dependent Claim 21 words

A method as claimed in claim 61 wherein said heat treatment is conducted at a temperature of 1000 to 1200° C.

Claim 79

Dependent Claim 58 words

A method according to claim 1 wherein said intrinsic or substantially intrinsic region contains phosphorus or boron, and concentration of phosphorus or boron therein is 5×10 17 atoms/cm 3 or less, and said intrinsic or substantially intrinsic region contains carbon, nitrogen or oxygen, and concentration of carbon, nitrogen or oxygen therein is 2×10 18 atoms/cm 3 or less.

Claim 80

Dependent Claim 58 words

A method according to claim 7 wherein said intrinsic or substantially intrinsic region contains phosphorus or boron, and concentration of phosphorus or boron therein is 5×10 17 atoms/cm 3 or less, and said intrinsic or substantially intrinsic region contains carbon, nitrogen or oxygen, and concentration of carbon, nitrogen or oxygen therein is 2×10 18 atoms/cm 3 or less.

Claim 81

Dependent Claim 58 words

A method according to claim 9 wherein said intrinsic or substantially intrinsic region contains phosphorus or boron, and concentration of phosphorus or boron therein is 5×10 17 atoms/cm 3 or less, and said intrinsic or substantially intrinsic region contains carbon, nitrogen or oxygen, and concentration of carbon, nitrogen or oxygen therein is 2×10 18 atoms/cm 3 or less.

Claim 82

Dependent Claim 58 words

A method according to claim 13 wherein said intrinsic or substantially intrinsic region contains phosphorus or boron, and concentration of phosphorus or boron therein is 5×10 17 atoms/cm 3 or less, and said intrinsic or substantially intrinsic region contains carbon, nitrogen or oxygen, and concentration of carbon, nitrogen or oxygen therein is 2×10 18 atoms/cm 3 or less.

Claim 83

Dependent Claim 58 words

A method according to claim 15 wherein said intrinsic or substantially intrinsic region contains phosphorus or boron, and concentration of phosphorus or boron therein is 5×10 17 atoms/cm 3 or less, and said intrinsic or substantially intrinsic region contains carbon, nitrogen or oxygen, and concentration of carbon, nitrogen or oxygen therein is 2×10 18 atoms/cm 3 or less.

Claim 84

Dependent Claim 58 words

A method according to claim 18 wherein said intrinsic or substantially intrinsic region contains phosphorus or boron, and concentration of phosphorus or boron therein is 5×10 17 atoms/cm 3 or less, and said intrinsic or substantially intrinsic region contains carbon, nitrogen or oxygen, and concentration of carbon, nitrogen or oxygen therein is 2×10 18 atoms/cm 3 or less.

Claim 85

Independent Claim 171 words

A method of manufacturing an insulated gate semiconductor device, said method comprising: forming a resist over a crystal semiconductor comprising a part to become a channel forming region; forming a dotted hole in said resist by patterning said resist using electron drawing method; forming an intrinsic or substantially intrinsic region and impurity regions in said part to become the channel forming region by introducing a first impurity into said channel forming region through said resist having said dotted hole, said first impurity being selected from the group consisting of carbon, nitrogen and oxygen; and introducing into said crystal semiconductor a second impurity that gives one conductivity to form a source region and a drain region in said crystal semiconductor with said channel forming region therebetween, wherein said impurity regions have total width of Wpi in a direction of a channel width W, and a total width of said intrinsic or substantially intrinsic region is Wpa in said direction of said channel width W, where Wpi/W=0.1 to 0.9 and Wpa/W=0.1 to 0.9.

Claim 86

Independent Claim 171 words

A method of manufacturing an insulated gate semiconductor device, said method comprising: forming a resist over a crystal semiconductor comprising a part to become a channel forming region; forming a dotted hole in said resist by patterning said resist using electron drawing method; forming an intrinsic or substantially intrinsic region and impurity regions in said part to become the channel forming region by introducing a first impurity into said channel forming region through said resist having said dotted hole, said first impurity being selected from the group consisting of carbon, nitrogen and oxygen; and introducing into said crystal semiconductor a second impurity that gives one conductivity to form a source region and a drain region in said crystal semiconductor with said channel forming region therebetween, wherein said impurity regions have total width of Wpi in a direction of a channel width W, and a total width of said intrinsic or substantially intrinsic region is Wpa in said direction of said channel width W, where Wpi/W=0.1 to 0.9 and Wpa/W=0.1 to 0.9.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	2008-03-14	2008-09-13	2009-03-15	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	2012-03-14	2012-09-13	2013-03-15	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	2016-03-14	2016-09-13	2017-03-15	$7700.00	Window Closed / Lapsed

Insulated gate semiconductor device and method of manufacturing the same

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