US5905291A
Expired / Lapsed
US
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MISFET semiconductor integrated circuit device
Assignee: Seiko Instruments Inc
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Filing: 1995-07-18
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Granted: 1999-05-18
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Expires: 2015-07-18
Abstract
Abstract A semiconductor integrated circuit device comprises at least two MISFETs formed on a semiconductor substrate and connected in series in a diode connection. Each of the MISFETs has a source, a drain, a channel extending between the source and the drain, and a gate disposed over the channel through a gate insulating film. One of the MISFETs has a first threshold voltage, and the other of the MISFETs has a second threshold voltage lower than the first threshold voltage. A portion of the channel of the semiconductor substrate of each of the MISFETs has an impurity concentration equal to or less than 6×10 14 atoms/cc.
Inventors
- 👤 Fumiyasu Utsunomiya
- 👤 Yutaka Saitoh
- 👤 Naoto Saitoh
- 👤 Jun Osanai
- 👤 Haruo Konishi
- 👤 Masanori Miyagi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 23:18
CPC Classifications
H; H10; H10D; H10D89/00; H10D89/211; H10D84/00; H10D84/80; H10D84/811
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
111 words
A semiconductor integrated circuit device comprising: a first MISFET and a second MISFET both formed on a semiconductor substrate and connected in series in a diode connection, each of the first and second MISFETs having a source, a drain, a channel disposed between the source and the drain, and a gate disposed over the channel through a gate insulating film, the first MISFET having a first threshold voltage, and the second MISFET having a second threshold voltage lower than the first threshold voltage; wherein a portion of the semiconductor substrate at the channel region of each of the MISFETs has an impurity concentration equal to or less than 6×10 14 atoms/cc.
Claim 2
Dependent Claim
111 words
A semiconductor integrated circuit device comprising: a first MISFET and a second MISFET both formed on a semiconductor substrate and connected in series in a diode connection, each of the first and second MISFETs having a source, a drain, a channel disposed between the source and the drain, and a gate disposed over the channel through a gate insulating film, the first MISFET having a first threshold voltage, and the second MISFET having a second threshold voltage lower than the first threshold voltage; wherein a portion of the semiconductor substrate at the channel region of each of the MISFETs has an impurity concentration equal to or less than 6×10 14 atoms/cc.
Claim 3
Dependent Claim
196 words
A semiconductor integrated circuit device comprising: a first MISFET and a second MISFET both formed on a semiconductor substrate and connected in series in a diode connection, each of the first and second MISFETs having a source, a drain, a channel disposed between the source and the drain, and a gate disposed over the channel through a gate insulating film, the first MISFET having a first threshold voltage, and the second MISFET having a second threshold voltage lower than the first threshold voltage; wherein the drain and the gate of the first MISFET are connected to a first node, the drain and the gate of the second MISFET are connected to a second node, the source of the first MISFET is connected to the second node, a first input signal having a first phase is inputted to the first node via a capacitance element, a second input signal having a second phase different from the first phase of the first input signal is inputted to the second node via a capacitance element, and an input voltage applied to the first node is outputted from the source of the second MISFET after boosting the first input voltage.
Claim 4
Dependent Claim
196 words
A semiconductor integrated circuit device comprising: a first MISFET and a second MISFET both formed on a semiconductor substrate and connected in series in a diode connection, each of the first and second MISFETs having a source, a drain, a channel disposed between the source and the drain, and a gate disposed over the channel through a gate insulating film, the first MISFET having a first threshold voltage, and the second MISFET having a second threshold voltage lower than the first threshold voltage; wherein the drain and the gate of the first MISFET are connected to a first node, the drain and the gate of the second MISFET are connected to a second node, the source of the first MISFET is connected to the second node, a first input signal having a first phase is inputted to the first node via a capacitance element, a second input signal having a second phase different from the first phase of the first input signal is inputted to the second node via a capacitance element, and an input voltage applied to the first node is outputted from the source of the second MISFET after boosting the first input voltage.
Claim 5
Dependent Claim
129 words
A semiconductor integrated circuit device comprising: a first MISFET and a second MISFET both formed on a semiconductor substrate and connected in series in a diode connection, each of the first and second MISFETs having a source, a drain, a channel disposed between the source and the drain, and a gate disposed over the channel through a gate insulating film, the first MISFET having a first threshold voltage, and the second MISFET having a second threshold voltage lower than the first threshold voltage; wherein a first impurity concentration at a portion of the semiconductor substrate between the source and the drain of the first MISFET is higher than a second impurity concentration at a portion of the semiconductor substrate between the source and the drain of the second MISFET.
Claim 6
Dependent Claim
129 words
A semiconductor integrated circuit device comprising: a first MISFET and a second MISFET both formed on a semiconductor substrate and connected in series in a diode connection, each of the first and second MISFETs having a source, a drain, a channel disposed between the source and the drain, and a gate disposed over the channel through a gate insulating film, the first MISFET having a first threshold voltage, and the second MISFET having a second threshold voltage lower than the first threshold voltage; wherein a first impurity concentration at a portion of the semiconductor substrate between the source and the drain of the first MISFET is higher than a second impurity concentration at a portion of the semiconductor substrate between the source and the drain of the second MISFET.
Claim 7
Dependent Claim
105 words
A semiconductor integrated circuit device comprising: a first MISFET and a second MISFET both formed on a semiconductor substrate and connected in series in a diode connection, each of the first and second MISFETs having a source, a drain, a channel disposed between the source and the drain, and a gate disposed over the channel through a gate insulating film, the first MISFET having a first threshold voltage, and the second MISFET having a second threshold voltage lower than the first threshold voltage; wherein a length of the channel of the first MISFET is larger than a length of the channel of the second MISFET.
Claim 8
Dependent Claim
105 words
A semiconductor integrated circuit device comprising: a first MISFET and a second MISFET both formed on a semiconductor substrate and connected in series in a diode connection, each of the first and second MISFETs having a source, a drain, a channel disposed between the source and the drain, and a gate disposed over the channel through a gate insulating film, the first MISFET having a first threshold voltage, and the second MISFET having a second threshold voltage lower than the first threshold voltage; wherein a length of the channel of the first MISFET is larger than a length of the channel of the second MISFET.
Claim 9
Dependent Claim
201 words
A semiconductor integrated circuit device comprising: a first MISFET and a second MISFET both formed on a semiconductor substrate and connected in series in a diode connection, each of the first and second MISFETs having a source, a drain, a channel disposed between the source and the drain, and a gate disposed over the channel through a gate insulating film, the first MISFET having a first threshold voltage, and the second MISFET having a second threshold voltage lower than the first threshold voltage; wherein the gate insulating film of each of the first and second MISFETs comprises a first gate insulating film having a first thickness and a second gate insulating film having a second thickness smaller than the first thickness, the first gate insulating film and the second gate insulating film of each of the first and second MISFETs extending in a length direction of the channel of the first MISFET and the second MISFET, respectively, and a channel length of a total of the channel prescribed by the first gate insulating film of the first MISFET is shorter than a channel length of a total of the channel prescribed by the first gate insulating film of the second MISFET.
Claim 10
Dependent Claim
201 words
A semiconductor integrated circuit device comprising: a first MISFET and a second MISFET both formed on a semiconductor substrate and connected in series in a diode connection, each of the first and second MISFETs having a source, a drain, a channel disposed between the source and the drain, and a gate disposed over the channel through a gate insulating film, the first MISFET having a first threshold voltage, and the second MISFET having a second threshold voltage lower than the first threshold voltage; wherein the gate insulating film of each of the first and second MISFETs comprises a first gate insulating film having a first thickness and a second gate insulating film having a second thickness smaller than the first thickness, the first gate insulating film and the second gate insulating film of each of the first and second MISFETs extending in a length direction of the channel of the first MISFET and the second MISFET, respectively, and a channel length of a total of the channel prescribed by the first gate insulating film of the first MISFET is shorter than a channel length of a total of the channel prescribed by the first gate insulating film of the second MISFET.
Claim 11
Dependent Claim
204 words
A semiconductor integrated circuit device comprising: a first MISFET and a second MISFET both formed on a semiconductor substrate and connected in series in a diode connection, each of the first and second MISFETs having a source, a drain, a channel disposed between the source and the drain, and a gate disposed over the channel through a gate insulating film, the first MISFET having a first threshold voltage, and the second MISFET having a second threshold voltage lower than the first threshold voltage; wherein the gate insulating film of each of the first and the second MISFETs comprises a first gate insulating film having a first thickness and a second gate insulating film having a second thickness smaller than the first thickness, the first gate insulating film and the second gate insulating film of each of the first and second MISFETs extending in a length direction of the channel of the first MISFET and the second MISFET, respectively, and a first channel length of a total of the channel prescribed by the second gate insulating film of the first MISFET is larger than a second channel length of a total of the channel prescribed by the second gate insulating film of the second MISFET.
Claim 12
Dependent Claim
204 words
A semiconductor integrated circuit device comprising: a first MISFET and a second MISFET both formed on a semiconductor substrate and connected in series in a diode connection, each of the first and second MISFETs having a source, a drain, a channel disposed between the source and the drain, and a gate disposed over the channel through a gate insulating film, the first MISFET having a first threshold voltage, and the second MISFET having a second threshold voltage lower than the first threshold voltage; wherein the gate insulating film of each of the first and the second MISFETs comprises a first gate insulating film having a first thickness and a second gate insulating film having a second thickness smaller than the first thickness, the first gate insulating film and the second gate insulating film of each of the first and second MISFETs extending in a length direction of the channel of the first MISFET and the second MISFET, respectively, and a first channel length of a total of the channel prescribed by the second gate insulating film of the first MISFET is larger than a second channel length of a total of the channel prescribed by the second gate insulating film of the second MISFET.
Claim 13
Dependent Claim
49 words
A semiconductor integrated circuit device according to claim 5; wherein the gate comprises a first gate disposed on the first gate insulating film; and further comprising a second gate disposed on the second gate insulating film, the first and second gates being formed separately and independently from each other.
Claim 14
Dependent Claim
70 words
A semiconductor integrated circuit device having a voltage boosting circuit, comprising: a plurality of MISFETs connected together in a diode connection, each of the MISFETs being formed on a semiconductor substrate and having a source, a drain and a channel region disposed between the source and the drain, a portion of the semiconductor substrate at the channel region having an impurity concentration equal to or less than 6×10 14 atoms/cc.
Claim 15
Dependent Claim
70 words
A semiconductor integrated circuit device having a voltage boosting circuit, comprising: a plurality of MISFETs connected together in a diode connection, each of the MISFETs being formed on a semiconductor substrate and having a source, a drain and a channel region disposed between the source and the drain, a portion of the semiconductor substrate at the channel region having an impurity concentration equal to or less than 6×10 14 atoms/cc.
Claim 16
Dependent Claim
107 words
A semiconductor integrated circuit device comprising: at least two MISFETs formed on a semiconductor substrate and connected in series in a diode connection, each of the MISFETs having a source, a drain, a channel extending between the source and the drain, a first gate insulating film disposed over the channel, a first gate formed over the first gate insulating film, a second gate insulating film disposed over the channel, and a second gate disposed over the second gate insulating film and formed separately and independently from the first gate, the first gate insulating film having a thickness greater than a thickness of the second gate insulating film.
Claim 17
Dependent Claim
107 words
A semiconductor integrated circuit device comprising: at least two MISFETs formed on a semiconductor substrate and connected in series in a diode connection, each of the MISFETs having a source, a drain, a channel extending between the source and the drain, a first gate insulating film disposed over the channel, a first gate formed over the first gate insulating film, a second gate insulating film disposed over the channel, and a second gate disposed over the second gate insulating film and formed separately and independently from the first gate, the first gate insulating film having a thickness greater than a thickness of the second gate insulating film.
References Cited (Backward Citations)
JPS53123676A
Cited
US4651406A
Cited
DE3107543A1
Cited
US4471373A
Cited
JPS56162861A
Cited
JPS5724567A
Cited
US4488061A
Cited
JPS586175A
Cited
US4740714A
Cited
JPS59231869A
Cited
JPS6091676A
Cited
DD228387A1
Cited
US4866002A
Cited
JPS62248256A
Cited
JPS63110665A
Cited
JPS63132478A
Cited
US5006974A
Cited
JPH01183844A
Cited
USRE35121E
Cited
JPH02234462A
Cited
JPH04162771A
Cited
US5081371A
Cited
US5285069A
Cited
US5317179A
Cited
US5362981A
Cited
US5497021A
Cited
JPH05315610A
Cited
US5495122A
Cited
US5499183A
Cited
US5475335A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-05-17 | 2002-11-16 | 2003-05-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-05-17 | 2006-11-16 | 2007-05-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-05-17 | 2010-11-16 | 2011-05-18 | $7700.00 | Window Closed / Lapsed |