US5475335A
Expired / Lapsed
US
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High voltage cascaded charge pump
Assignee: National Semiconductor Corp
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Filing: 1994-10-07
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Granted: 1995-12-12
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Expires: 2014-10-07
Abstract
Abstract A cascaded charge pump includes multiple stages each providing a (nominal) 3 volt increment. Thus a charge pump having an 18 volt range is provided using a CMOS process which normally then allows integration on a single integrated circuit chip of a complex digital logic function such as a UART (universal asynchronous receiver and transmitter) with a high voltage function such as an RS-232 interface, including integrated capacitors for the RS-232 interface charge pump.
Inventors
- 👤 Richard B. Merrill
- 👤 Whu-ming Young
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 13:32
CPC Classifications
H; H10; H10D; H10D89/00; H10D89/211; H10D89/213; H10D89/215; H02; H02M; H02M3/00; H02M3/02; H02M3/04; H02M3/06; H02M3/07; H10D30/00; H10D30/60; H10D30/601; H10D30/603; H10D62/00; H10D62/10; H10D62/13; H10D62/149; H10D62/151; H10D62/17; H10D62/351; H10D62/357; H10D62/364; H10D62/371; H10D62/378; H10D84/00; H10D84/80; H10D84/82; H10D84/83; H10D84/85; H10D84/859
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
170 words
A cascaded charge pump circuit formed on a single semiconductor substrate, comprising: a plurality of N charge pumps, each charge pump i having a first and second input terminal and an output terminal; a voltage supply terminal; a voltage reference terminal; and a circuit output terminal; wherein the first input terminal of a first charge pump i=1 in the plurality of charge pumps is connected to the voltage supply terminal, and the second input terminal of the first charge pump is connected to the voltage reference terminal; and wherein for each successive charge pump i, where i=2 to N, in the plurality of charge pumps, the first input terminal is connected to the output terminal of the i-1 charge pump, and the second input terminal is connected to the first input terminal of the i-1 charge pump; and wherein the output terminal of the charge pump i=N is connected to the circuit output terminal; and each charge pump is electrically isolated on the semiconductor substrate from the other charge pumps.
Claim 2
Dependent Claim
170 words
A cascaded charge pump circuit formed on a single semiconductor substrate, comprising: a plurality of N charge pumps, each charge pump i having a first and second input terminal and an output terminal; a voltage supply terminal; a voltage reference terminal; and a circuit output terminal; wherein the first input terminal of a first charge pump i=1 in the plurality of charge pumps is connected to the voltage supply terminal, and the second input terminal of the first charge pump is connected to the voltage reference terminal; and wherein for each successive charge pump i, where i=2 to N, in the plurality of charge pumps, the first input terminal is connected to the output terminal of the i-1 charge pump, and the second input terminal is connected to the first input terminal of the i-1 charge pump; and wherein the output terminal of the charge pump i=N is connected to the circuit output terminal; and each charge pump is electrically isolated on the semiconductor substrate from the other charge pumps.
Claim 3
Dependent Claim
83 words
The circuit of claim 1, further comprising a plurality of N+1 switch elements, each switch element k, where k=1 to N+1, being connected between the first input terminals of respectively associated charge pumps i and i+1, except for the k=N+1 switch element which is connected between the output terminal of charge pump N and the first input terminal of charge pump N, and the first switch element k=1 which is connected between the first and second input terminals of the first charge pump.
Claim 4
Dependent Claim
36 words
The circuit of claim 1, wherein each charge pump comprises: a first stage and a second stage, each stage having at least one control terminal; and a capacitor operatively connected between the first and second stages.
Claim 5
Dependent Claim
44 words
The circuit of claim 3, wherein each stage includes: two transistors, each having a gate terminal connected to a control terminal of the stage and each having an output terminal connected to the capacitor; and a diode connected across each of the two transistors.
Claim 6
Dependent Claim
21 words
The circuit of claim 3, wherein the cascaded charge pump circuit semiconductor substrate also includes the capacitor of each charge pump.
Claim 7
Independent Claim
102 words
A method of generating a particular voltage level greater than a supply voltage level, comprising the steps of: providing a cascaded set of charge pumps, all elements of which are formed on a single integrated circuit chip; using the supply voltage level to generate an intermediate voltage higher than the supply voltage level by a predetermined amount using the cascaded charge pumps; and increasing the intermediate voltage by the predetermined amount n times, n being greater than one thereby generating a plurality of intermediate voltages; and wherein each charge pump is electrically isolated on the semiconductor substrate from the other charge pumps.
Claim 8
Independent Claim
102 words
A method of generating a particular voltage level greater than a supply voltage level, comprising the steps of: providing a cascaded set of charge pumps, all elements of which are formed on a single integrated circuit chip; using the supply voltage level to generate an intermediate voltage higher than the supply voltage level by a predetermined amount using the cascaded charge pumps; and increasing the intermediate voltage by the predetermined amount n times, n being greater than one thereby generating a plurality of intermediate voltages; and wherein each charge pump is electrically isolated on the semiconductor substrate from the other charge pumps.
Claim 9
Dependent Claim
45 words
The method of claim 6, further comprising the steps of: providing a plurality of switch elements connected to receive each of the plurality of intermediate voltages; and operating the switch elements to provide any one of the plurality of intermediate voltages as an output voltage.
References Cited (Backward Citations)
US5036229A
Cited
US5319604A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-12-11 | 1999-06-12 | 1999-12-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-12-11 | 2003-06-12 | 2003-12-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-12-11 | 2007-06-12 | 2007-12-12 | $7700.00 | Window Closed / Lapsed |