US5495122A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Insulated-gate semiconductor field effect transistor which operates with a low gate voltage and high drain and source voltages
Assignee: Fuji Electric Co Ltd
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Filing: 1994-05-19
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Granted: 1996-02-27
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Expires: 2014-05-19
Abstract
Abstract In a low voltage drive circuit section of a semiconductor integrated circuit, the gate oxide films are approximately 250 Å, and a low voltage N-channel IGFET and a low voltage P-channel IGFET are operable at high speed and driven at a low voltage. In a high voltage driven circuit section, the gate oxide films are approximately 1500 Å, and a high voltage N-channel IGFET and a high voltage P-channel IGFET are designed to have a high breakdown voltage performance. In a low gate voltage/high voltage drive circuit section, the gate oxide films are approximately 250 Å, and a high voltage N-channel IGFET is driven at a low gate voltage and operable at high speed. The high voltage N-channel IGFET of the low gate voltage/high voltage drive circuit section has an offset structure including a drain diffusion layer of low concentration, such that the breakdown voltage of the drain is greatly increased.
Inventors
- 👤 Gen Tada
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 22:20
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/80; H10D84/82; H10D84/83; H10D84/8314
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
149 words
A semiconductor integrated circuit comprising: a first insulated gate semiconductor field effect transistor (IGFET) having a first gate, a first source, and a first drain operated with a low gate voltage level and a low source-drain voltage level; a second IGFET having a second gate, a second source, and a second drain operated with a high gate voltage level substantially greater than the low gate voltage level and a high source-drain voltage substantially greater than the low source-drain voltage level; and a third IGFET having a third gate, a third source, and a third drain operated with the low gate voltage level on the third gate, and the high source-drain voltage level, said third IGFET having a high impurity drain region in a low impurity drain region, and a gate insulating film of the third IGFET is thinner than that of a gate insulating film of the second IGFET.
Claim 2
Dependent Claim
149 words
A semiconductor integrated circuit comprising: a first insulated gate semiconductor field effect transistor (IGFET) having a first gate, a first source, and a first drain operated with a low gate voltage level and a low source-drain voltage level; a second IGFET having a second gate, a second source, and a second drain operated with a high gate voltage level substantially greater than the low gate voltage level and a high source-drain voltage substantially greater than the low source-drain voltage level; and a third IGFET having a third gate, a third source, and a third drain operated with the low gate voltage level on the third gate, and the high source-drain voltage level, said third IGFET having a high impurity drain region in a low impurity drain region, and a gate insulating film of the third IGFET is thinner than that of a gate insulating film of the second IGFET.
Claim 3
Dependent Claim
33 words
A semiconductor integrated circuit according to claim 1, wherein the gate insulating film of the third IGFET is substantially equal in thickness to that of a gate insulating film of the first IGFET.
Claim 4
Dependent Claim
143 words
A semiconductor integrated circuit having a substrate and a plurality of insulated gate semiconductor field effect transistors (IGFETs), each having a gate, a drain, and a source, formed thereon, at least one of the IGFETs comprising: a high impurity drain region in a low impurity drain region, the low impurity drain :region between the gate and the drain and the substrate being reversely biased when the IGFET is in an on state; and a gate insulating film made of a field oxide film and having a thickness greater than the thickness of a gate insulating film for another of the plurality of IGFETs for which the substrate is not reversely biased, such that field effect is lessened, carrier concentration action is restricted at a portion of the low impurity drain region in contact with the gate insulating film, and breakdown voltage is increased.
Claim 5
Dependent Claim
143 words
A semiconductor integrated circuit having a substrate and a plurality of insulated gate semiconductor field effect transistors (IGFETs), each having a gate, a drain, and a source, formed thereon, at least one of the IGFETs comprising: a high impurity drain region in a low impurity drain region, the low impurity drain :region between the gate and the drain and the substrate being reversely biased when the IGFET is in an on state; and a gate insulating film made of a field oxide film and having a thickness greater than the thickness of a gate insulating film for another of the plurality of IGFETs for which the substrate is not reversely biased, such that field effect is lessened, carrier concentration action is restricted at a portion of the low impurity drain region in contact with the gate insulating film, and breakdown voltage is increased.
References Cited (Backward Citations)
US4471373A
Cited
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| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1999-02-26 | 1999-08-28 | 2000-02-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-02-26 | 2003-08-28 | 2004-02-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-02-26 | 2007-08-28 | 2008-02-27 | $7700.00 | Window Closed / Lapsed |