Constant voltage generating circuit having step-up circuit

Claim 2

A constant voltage generating circuit comprising: a step-up circuit of a charge pump type for generating a predetermined high voltage by action of a charge pumping in response to a clock signal; a high voltage output terminal connected to an output of said step-up circuit for outputting the generated high voltage; a clamp circuit connected between said high voltage output terminal and a first voltage supply terminal, said clamp circuit including a clamp element and a first MOSFET of a first channel type having a drain and a gate interconnected to each other, said first MOSFET and said clamp element being connected in series between said high voltage output terminal and said first voltage supply terminal; a charge detecting circuit reset by a reset signal and operating to generate a charge detection signal when a current having flowed through said clamp circuit reaches a predetermined value, said charge detecting circuit including a second MOSFET of said first channel type having a source connected to said high voltage output terminal and a gate connected to the gate and the drain of said first MOSFET, a third MOSFET of a second channel type opposite to said first channel type, having a gate and a drain connected in common to a drain of said second MOSFET, and a source connected to said first voltage supply terminal, a fourth MOSFET of said first channel type having a source connected to a second voltage supply terminal and a gate connected to receive an inverted signal of said reset signal, a fifth MOSFET of said second channel type having a drain connected to a drain of said fourth MOSFET, a gate connected to said gate of third MOSFET, and a source connected to said first voltage supply terminal, a capacitor connected between said drain of said fifth MOSFET and said first voltage supply terminal, an invertor having an input connected to said drain of said fifth MOSFET and an output for outputting said charge detection signal, and a sixth MOSFET of said second channel type having a drain connected to said drain of said fifth MOSFET, a gate connected to said output of said invertor, and a source connected to said first voltage supply terminal; a clock control circuit responding to said charge detection signal so as to stop application of said clock signal to said step-up circuit.

Claim 3

A constant voltage generating circuit claimed in claim 1 wherein said clock control circuit includes a RS flipflop reset by said reset signal and set by said charge detection signal, said clock control circuit operating to stop application of said clock signal to said step-up circuit when said RS flipflop is set.

Claim 4

A constant voltage generating circuit comprising: a step-up circuit of a charge pump type for generating a predetermined high voltage by action of a charge pumping in response to a clock signal; a high voltage output terminal connected to an output of said step-up circuit for outputting the generated high voltage; a clamp circuit connected between said high voltage output terminal and a first voltage supply terminal, said clamp circuit including a clamp element and a first MOSFET of a first channel type having a drain and a gate interconnected to each other, said first MOSFET and said clamp element being connected in series between said high voltage output terminal and said first voltage supply terminal; a charge detecting circuit reset by a reset signal and operating to generate a charge detection signal when a current having flowed through said clamp circuit reaches a predetermined value, said charge detecting circuit including a second MOSFET of a second channel type opposite to said first channel type, having a source connected to a second voltage supply terminal and a gate connected to receive an inverted signal of said reset signal, a third MOSFET of said first channel type having a drain connected to a drain of said second MOSFET, a gate connected to said gate of said first MOSFET, and a source connected to said first voltage supply terminal, a capacitor connected between said drain of said third MOSFET and said first voltage supply terminal, an invertor having an input connected to said drain of said first MOSFET in an output for outputting said charge detection signal, and a fourth MOSFET of said first channel type having a drain connected to said drain of said third MOSFET, a gate connected to said output of said invertor, and a source connected to said first voltage supply terminal; and a clock control circuit responding to said charge detection signal so as to stop application of said clock signal to said step-up circuit.

Claim 5

A constant voltage generating circuit comprising: a step-up circuit of a charge pump type for generating a predetermined high voltage by action of a charge pumping in response to a clock signal; a high voltage output terminal connected to an output of said step-up circuit for outputting the generated high voltage; a clamp circuit connected between said high voltage output terminal and a first voltage supply terminal, said clamp circuit including a clamp element and a first MOSFET of a first channel type having a drain and a gate interconnected to each other, said first MOSFET and said clamp element being connected in series between said high voltage output terminal and said first voltage supply terminal; a charge detecting circuit reset by a reset signal and operating to generate a charge detection signal when a current having flowed through said clamp circuit reaches a predetermined value, said charge detecting circuit including a second MOSFET of a second channel type opposite to said first channel type, having a source connected to a second voltage supply terminal and a gate connected to receive an inverted signal of said reset signal, a third MOSFET of said first channel type having a drain connected to a drain of said second MOSFET, a gate connected to said gate of said first MOSFET, and a source connected to said first voltage supply terminal, a capacitor connected between said drain of said third MOSFET and said first voltage supply terminal, an invertor having an input connected to said drain of said first MOSFET in an output for outputting said charge detection signal, and a fourth MOSFET of said first channel type having a drain connected to said drain of said third MOSFET, a gate connected to said output of said invertor, and a source connected to said first voltage supply terminal; and a clock control circuit responding to said charge detection signal so as to stop application of said clock signal to said step-up circuit.

Claim 6

A constant voltage generating circuit claimed in claim 3 wherein said clock control circuit includes a RS flipflop reset by said reset signal and set by said charge detection signal, said clock control circuit operating to stop application of said clock signal to said step-up circuit when said RS flipflop is set.

Claim 7

A constant voltage generating circuit comprising: a step-up circuit of a charge pump type for generating a predetermined high voltage by action of a charge pumping in response to a clock signal; a high voltage output terminal connected to an output of the step-up circuit for outputting the generated high voltage; a clamp circuit connected between the high voltage output terminal and a first voltage supply terminal, said clamp circuit including a clamp element and a first MOSFET of a first channel type having a drain and a gate interconnected to each other, said first MOSFET and said clamp element being connected in series between said high voltage output terminal and said first voltage supply terminal; a charge detection circuit reset by a reset signal and operating to generate a charge detection signal when a current flowing through the clamp circuit reaches a predetermined value, said charge detecting circuit including a second MOSFET of said first channel type having a source connected to said high voltage output terminal and a gate connected to the gate and the drain of said first MOSFET, a third MOSFET of a second channel type opposite to said first channel type, having a gate and a drain connected in common to a drain of said second MOSFET and a source connected to said first voltage supply terminal, a fourth MOSFET of said first channel type having a source connected to a second voltage supply terminal and a gate connected to receive an inverted signal of said reset signal, a fifth MOSFET of said second channel type having a drain connected to a drain of said fourth MOSFET, a gate connected to said gate of said third MOSFET, and a source connected to said first voltage supply terminal, a capacitor connected between said drain of said fifth MOSFET and said first voltage supply terminal, an invertor having an input connected to said drain of said fifth MOSFET and an output for outputting said charge detection signal, and a sixth MOSFET of said second channel type having a drain connected to said drain of said fifth MOSFET, a gate connected to said output of said invertor, and a source connected to said first voltage supply terminal; and a clock control circuit including a RS flip-flop reset by the reset signal and set by the charge detection signal, the clock control circuit operating to respond to the charge detection signal so as to stop application of the clock signal to the step-up circuit.

Claim 8

A constant voltage generating circuit comprising: a step-up circuit of a charge pump type for generating a predetermined high voltage by action of a charge pumping in response to a clock signal; a high voltage output terminal connected to an output of the step-up circuit for outputting the generated high voltage; a clamp circuit connected between the high voltage output terminal and a first voltage supply terminal, said clamp circuit including a clamp element and a first MOSFET of a first channel type having a drain and a gate interconnected to each other, said first MOSFET and said clamp element being connected in series between said high voltage output terminal and said first voltage supply terminal; a charge detection circuit reset by a reset signal and operating to generate a charge detection signal when a current flowing through the clamp circuit reaches a predetermined value, said charge detecting circuit including a second MOSFET of said first channel type having a source connected to said high voltage output terminal and a gate connected to the gate and the drain of said first MOSFET, a third MOSFET of a second channel type opposite to said first channel type, having a gate and a drain connected in common to a drain of said second MOSFET and a source connected to said first voltage supply terminal, a fourth MOSFET of said first channel type having a source connected to a second voltage supply terminal and a gate connected to receive an inverted signal of said reset signal, a fifth MOSFET of said second channel type having a drain connected to a drain of said fourth MOSFET, a gate connected to said gate of said third MOSFET, and a source connected to said first voltage supply terminal, a capacitor connected between said drain of said fifth MOSFET and said first voltage supply terminal, an invertor having an input connected to said drain of said fifth MOSFET and an output for outputting said charge detection signal, and a sixth MOSFET of said second channel type having a drain connected to said drain of said fifth MOSFET, a gate connected to said output of said invertor, and a source connected to said first voltage supply terminal; and a clock control circuit including a RS flip-flop reset by the reset signal and set by the charge detection signal, the clock control circuit operating to respond to the charge detection signal so as to stop application of the clock signal to the step-up circuit.

Claim 9

A constant voltage generating circuit comprising: a step-up circuit of a charge pump type for generating a predetermined high voltage by action of a charge pumping in response to a clock signal; a high voltage output terminal connected to an output of the step-up circuit for outputting the generated high voltage; a clamp circuit connected between the high voltage output terminal and a first voltage supply terminal, said clamp circuit including a clamp element and a first MOSFET of a first channel type having a drain and a gate interconnected to each other, said first MOSFET and said clamp element being connected in series between said high voltage output terminal and said first voltage supply terminal; a charge detection circuit reset by a reset signal and operating to generate a charge detection signal when a current flowing through the clamp circuit reaches a predetermined value, said charge detecting circuit including a second MOSFET of said second channel type opposite to said first channel type, having a source connected to .a second voltage supply terminal and a gate connected to receive an inverted signal of said reset signal, a third MOSFET of said first channel type having a drain connected to a drain of said second MOSFET, a gate connected to said gate of said first MOSFET, and a source connected to said first voltage supply terminal, a capacitor connected between said drain of said third MOSFET and said first voltage supply terminal, an invertor having an input connected to said drain of said third MOSFET and an output for outputting said charge detection signal, and a fourth MOSFET of said first channel type having a drain connected to said drain of said third MOSFET, a gate connected to said output of said invertor, and a source connected to said first voltage supply terminal; and a clock control circuit including a RS flip-flop reset by the reset signal and set by the charge detection signal, the clock control circuit operating to respond to the charge detection signal so as to stop application of the clock signal to the step-up circuit.

Claim 10

A constant voltage generating circuit comprising: a step-up circuit of a charge pump type for generating a predetermined high voltage by action of a charge pumping in response to a clock signal; a high voltage output terminal connected to an output of the step-up circuit for outputting the generated high voltage; a clamp circuit connected between the high voltage output terminal and a first voltage supply terminal, said clamp circuit including a clamp element and a first MOSFET of a first channel type having a drain and a gate interconnected to each other, said first MOSFET and said clamp element being connected in series between said high voltage output terminal and said first voltage supply terminal; a charge detection circuit reset by a reset signal and operating to generate a charge detection signal when a current flowing through the clamp circuit reaches a predetermined value, said charge detecting circuit including a second MOSFET of said second channel type opposite to said first channel type, having a source connected to .a second voltage supply terminal and a gate connected to receive an inverted signal of said reset signal, a third MOSFET of said first channel type having a drain connected to a drain of said second MOSFET, a gate connected to said gate of said first MOSFET, and a source connected to said first voltage supply terminal, a capacitor connected between said drain of said third MOSFET and said first voltage supply terminal, an invertor having an input connected to said drain of said third MOSFET and an output for outputting said charge detection signal, and a fourth MOSFET of said first channel type having a drain connected to said drain of said third MOSFET, a gate connected to said output of said invertor, and a source connected to said first voltage supply terminal; and a clock control circuit including a RS flip-flop reset by the reset signal and set by the charge detection signal, the clock control circuit operating to respond to the charge detection signal so as to stop application of the clock signal to the step-up circuit.