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JPS6091676A Expired / Lapsed JP ⏱️ 0.0 years remaining

Mos semiconductor device

Assignee: Panasonic Holdings Corp
•
Filing: 1983-10-25
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Granted: —
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Expires: 2003-10-25
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Abstract

Abstract PURPOSE:To prevent the variation of threshold voltage in the vicinity of a drain by bringing a gate insulating film to a film with stepped sections thick on the source region side and thin on the drain region side without equalizing the thickness of the gate insulating film when a source region and a drain region are formd to a semicouductor substrate and a gate electrode is shaped between the source region and the drain region through the gate insulating film. CONSTITUTION:A gate insulating film 2 on which boron is diffused in order to control threshold voltage is applied on a P type Si substrate 1, and a stepped section is generated in the film 2 as a gate insulating film 3 in thin thickness by using an HF solution only on the drain side of the film 2 on a region as a channel through selective etching. A polycrystalline Si gate electrode 4 of a predetermined shape is formed extending over the films 2 and 3 while containing the stepped section, and the films 2 and 3 protruding to both sides of the electrode 4 are removed through etching. A source region 5 is diffused and formed to the substrate 1 on the film 2 side and a drain region 6 to the substrate 1 on the film 3 side respecively. Accordingly, the variation of threshold voltage in the vicinity of the region 6 by hotelectrons is avoided.

Inventors

  • 👤 Yoshiro Nakada
  • 👤 義朗 中田

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-08 09:36
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/20; H10D64/27; H10D64/311; H10D64/411; H10D64/511; H10D64/514; H10D64/516

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