US5210437A
Expired / Lapsed
US
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MOS device having a well layer for controlling threshold voltage
Assignee: Toshiba Corp
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Filing: 1992-08-10
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Granted: 1993-05-11
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Expires: 2012-08-10
Abstract
Abstract The present invention provides a semiconductor device having a well, formed in a semiconductor substrate by using a mask in which a mask pattern width of a portion corresponding to an opening diameter is equal to or less than twice the diffusion depth of the well layer, and a gate electrode formed to have the well layer as a channel region of a MOS transistor. The well formed in this manner has a substantially semi-circular section to facilitate impurity concentration control in the substrate surface. When a plurality of types of opening patterns having small pattern widths are formed in a single mask, MOS transistors having different threshold voltages can be formed in a single process.
Inventors
- 👤 Shizuo Sawada
- 👤 Seiko Iwasaki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 21:35
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D62/00; H10D62/10; H10D62/17; H10D62/213; H10D62/221; H10D62/235; H10D62/299; H10D62/307; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0135; H10D84/0142; H10D84/02; H10D84/03; H10D84/038; H10P; H10P30/00; H10P30/20; H10P30/22
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
115 words
A MOS device comprising: a semiconductor substrate of a first conductivity type having a major surface; a first insulating film on said major surface to define a MOS transistor region; a MOS transistor in said MOS transistor region including source and drain layers of a second conductivity type in said major surface and a gate electrode spaced from a channel region between said source and drain layers by a gate insulating film thinner than said first insulating film; and a well layer formed in and extending below said channel region to control a threshold voltage of said MOS transistor, said well layer having a substantially semi-circular section with a non-flat lower surface and non-flat sides.
Claim 2
Dependent Claim
115 words
A MOS device comprising: a semiconductor substrate of a first conductivity type having a major surface; a first insulating film on said major surface to define a MOS transistor region; a MOS transistor in said MOS transistor region including source and drain layers of a second conductivity type in said major surface and a gate electrode spaced from a channel region between said source and drain layers by a gate insulating film thinner than said first insulating film; and a well layer formed in and extending below said channel region to control a threshold voltage of said MOS transistor, said well layer having a substantially semi-circular section with a non-flat lower surface and non-flat sides.
Claim 3
Dependent Claim
28 words
A device according to claim 1, wherein said well layer is of the same conductivity type as that of said source and drain layers of said MOS transistor.
Claim 4
Dependent Claim
28 words
A device according to claim 1, wherein said well layer is of a conductivity type opposite to that of said source and drain layers of said MOS transistor.
Claim 5
Dependent Claim
106 words
A MOS device comprising: a semiconductor body having a major surface; a first insulating film on said major surface to define a MOS transistor region; a MOS transistor in said MOS transistor region having a source layer and a drain layer formed in said semiconductor body to define a channel region therebetween, and a gate electrode spaced from said channel region by a gate insulating film thinner than said first insulating film; and at least one well layer formed in and extending below said channel region to control a threshold voltage of said MOS transistor, said well layer having a substantially semicircular and continuously curved cross-section.
Claim 6
Dependent Claim
106 words
A MOS device comprising: a semiconductor body having a major surface; a first insulating film on said major surface to define a MOS transistor region; a MOS transistor in said MOS transistor region having a source layer and a drain layer formed in said semiconductor body to define a channel region therebetween, and a gate electrode spaced from said channel region by a gate insulating film thinner than said first insulating film; and at least one well layer formed in and extending below said channel region to control a threshold voltage of said MOS transistor, said well layer having a substantially semicircular and continuously curved cross-section.
Claim 7
Dependent Claim
18 words
The MOS device according to claim 4, wherein said at least one well layer comprises one well layer.
Claim 8
Dependent Claim
40 words
The MOS device according to claim 5, wherein a length of said gate electrode in a direction parallel to a length of said channel region is equal to or less than twice a depth X j of said well layer.
Claim 9
Dependent Claim
20 words
The MOS device according to claim 4, wherein said source, drain, and well layers are of a same conductivity type.
Claim 10
Dependent Claim
29 words
The MOS device according to claim 4 wherein said source and drain layers are of a first conductivity type and said well layer is of a second conductivity type.
Claim 11
Dependent Claim
109 words
A MOS device comprising: a semiconductor body having a major surface; a first insulating film on said major surface to define a MOS transistor region; a plurality of MOS transistors respectively formed in said MOS transistor regions, each MOS transistor comprising a source layer and a drain layer formed in said semiconductor body to define a channel region therebetween, and a gate electrode spaced from said channel region by a gate insulating film thinner than said first insulating film; and well layers formed in and extending below said channel regions to control respective threshold voltages of said MOS transistor, said well layers having substantially semicircular and continuously curved cross-sections.
Claim 12
Dependent Claim
109 words
A MOS device comprising: a semiconductor body having a major surface; a first insulating film on said major surface to define a MOS transistor region; a plurality of MOS transistors respectively formed in said MOS transistor regions, each MOS transistor comprising a source layer and a drain layer formed in said semiconductor body to define a channel region therebetween, and a gate electrode spaced from said channel region by a gate insulating film thinner than said first insulating film; and well layers formed in and extending below said channel regions to control respective threshold voltages of said MOS transistor, said well layers having substantially semicircular and continuously curved cross-sections.
Claim 13
Dependent Claim
59 words
A MOS device comprising: a semiconductor body; a MOS transistor having a source layer and a drain layer formed in said semiconductor body to define a channel region therebetween, and a gate electrode insulatively spaced from said channel region; and at least two well layers formed in said channel region to control a threshold voltage of said MOS transistor.
Claim 14
Dependent Claim
59 words
A MOS device comprising: a semiconductor body; a MOS transistor having a source layer and a drain layer formed in said semiconductor body to define a channel region therebetween, and a gate electrode insulatively spaced from said channel region; and at least two well layers formed in said channel region to control a threshold voltage of said MOS transistor.
Claim 15
Dependent Claim
18 words
The MOS device according to claim 10, wherein said well layers have substantially semicircular and continuously curved cross-sections.
Claim 16
Dependent Claim
15 words
The MOS device according to claim 10 wherein said well layers have substantially semicircular cross-sections.
Claim 17
Dependent Claim
15 words
The MOS device according to claim 10, wherein said well layers comprise elongated well layers.
Claim 18
Dependent Claim
23 words
The MOS device according to claim 13, wherein said elongated well layers extend in a direction parallel to a width of said channel.
Claim 19
Dependent Claim
92 words
A MOS device, comprising: a semiconductor body having a major surface; first and second MOS transistors respectively formed in first and second MOS transistor regions on said major surface; a first arrangement of well layers in a channel region of said first MOS transistor to set a threshold voltage of said first MOS transistor; and a second arrangement of well layers in a channel region of said second MOS transistor to set a threshold voltage of said second MOS transistor which is different than the threshold voltage of said first MOS transistor.
Claim 20
Dependent Claim
92 words
A MOS device, comprising: a semiconductor body having a major surface; first and second MOS transistors respectively formed in first and second MOS transistor regions on said major surface; a first arrangement of well layers in a channel region of said first MOS transistor to set a threshold voltage of said first MOS transistor; and a second arrangement of well layers in a channel region of said second MOS transistor to set a threshold voltage of said second MOS transistor which is different than the threshold voltage of said first MOS transistor.
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