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EP0055552A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Input protection circuit for an MIS transistor

Assignee: Fujitsu Ltd
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Filing: 1981-12-17
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Granted: —
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Expires: 2001-12-17
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Abstract

Abstract The input protection circuit protects a MIS transistor Q 0 from high voltages. Resistors R 1 and R 2 are connected in series between an input terminal in and the gate of the transistor Q o . A first protection transistor is connected between a point N1, where R 1 and R 2 are joined, and a ground power supply line V ss . A second protection transistor is connected between a point N2, where the resistor R 2 and the gate of transistor 0 0 are connected, and the high power supply line V cc . The second protection transistor Q 2 has a break-down voltage lower than the breakdown voltage of the MIS transistor Q 0 but has a high impedance when it is turned ON when a high voltage is applied to the input terminal in. The first protection transistor Q 1 has a breakdown voltage higher than that of the transistor Q o but has a low impedance when turned ON when a high voltage is applied to the input terminal in. The combination of protection transistor Q, and Q 2 provides adequate protection for the transistor Q o even when it has only a minute and very thin gate insulating film.

Inventors

  • 👤 Shigenobu Taira

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-26 02:09
CPC Classifications
H; H10; H10D; H10D89/00; H10D89/60; H10D89/601; H03; H03F; H03F1/00; H03F1/52; H03F1/523; H03K; H03K17/00; H03K17/08; H03K17/081; H03K17/0812; H03K17/08122; H10D30/00; H10D30/60

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 124 words
An input protection circuit, formed on a substrate, connected to a main circuit MIS transistor to be protected from the application of high voltage thereto, comprising: first and second impedance elements connected in series between an input terminal and the main circuit MIS transistor; first protection means, having a first breakdown voltage, connected between a power supply line and a first connecting point, at which the first and second imped ance elements, are connected.to one another; and second protection means, having a second breakdown voltage, lower than.the mainbreakdown voltage of the main circuit MIS transistor, connected between a power supply line and a second connecting point, ' at which the second impedance element and the main circuit MIS transistor are connected to one another.
Claim 2
Dependent Claim 124 words
An input protection circuit, formed on a substrate, connected to a main circuit MIS transistor to be protected from the application of high voltage thereto, comprising: first and second impedance elements connected in series between an input terminal and the main circuit MIS transistor; first protection means, having a first breakdown voltage, connected between a power supply line and a first connecting point, at which the first and second imped ance elements, are connected.to one another; and second protection means, having a second breakdown voltage, lower than.the mainbreakdown voltage of the main circuit MIS transistor, connected between a power supply line and a second connecting point, ' at which the second impedance element and the main circuit MIS transistor are connected to one another.
Claim 3
Dependent Claim 22 words
An input protection circuit as claimed in claim .1, wherein the first breakdown voltage is higher than the said main breakdown voltage.
Claim 4
Dependent Claim 61 words
An input protection circuit as claimed in claim 1 or 2, wherein the main circuit MIS transistor comprises a gate connected to the said input terminal (via the first and second impedance elements), and the said main breakdown voltage is a gate breakdown voltage which, if achieved, can result in damage to the said gate of the main circuit MIS transistor.
Claim 5
Dependent Claim 48 words
An input protection circuit as claimed in claim 1, 2 or 3, wherein the second impedance element has a predetermined impedance value such that a potential at the said second connecting point is lower than the said main breakdown voltage when the second protection means is turned ON.
Claim 6
Dependent Claim 42 words
An input protection circuit as claimed in claim 4, whereinithe first protection means comprises a first transistor having a first mutual conductance, and the second protection means comprises a second transistor having a second mutual conductance, lower than the first mutual conductance.
Claim 7
Dependent Claim 123 words
An input protection circuit as claimed in claim 5, wherein the first transistor comprises : a first diffusion region formed in the substrate and connected to the first connecting point; a channel region , the impurity type of which is opposite to that of the first diffusion region, formed in the substrate contiguously with the first diffusion region; and a second diffusion region, the impurity type of which is the same as that of the first diffusion region, formed in the substrate contiguously with the channel region, and connected to a ground power supply line ; wherein impurity concentration of the first and second diffusion regions is the same as that of a drain or source region of the main circuit MIS transistor.
Claim 8
Dependent Claim 71 words
7 . An input protection circuit as claimed in claim 5 or 6, wherein the second transistor comprises : a source or drain region connected to the second connecting point; a drain or source region connected to a high voltage power supply line ; and a gate connected to the second connecting point; wherein threshold voltage of the second transistor is the same as that of the main circuit MIS transistor.
Claim 9
Dependent Claim 58 words
An input protection circuit as claimed in claim 5 or 6, wherein the second transistor comprises: a source or drain region connected to the second connecting point; and a drain or source region connected to a ground power supply line; wherein threshold voltage of the second transistor is the same as that of the main circuit MIS transistor.
Claim 10
Dependent Claim 24 words
An input protection circuit as claimed in any preceding claim, wherein the first imped nce element comprises a diffusion region formed in the substrate.
Claim 11
Dependent Claim 17 words
An input protection circuit as claimed in any preceding claim,wherein the second impedance cement comprises polycrystalline silicon.

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