Patent US6486546B2 successfully refreshed from Google Patents.
← Back to Patent Explorer
US6486546B2 Expired / Lapsed US ⏱️ 0.0 years remaining

Low profile multi-IC chip package connector

Assignee: Micron Technology Inc
•
Filing: 2002-02-06
•
Granted: 2002-11-26
•
Expires: 2022-02-06
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A low profile multi-IC chip package for high speed application comprises a connector for electrically connecting the equivalent outer leads of a set of stacked primary semiconductor packages. In one embodiment, the connector comprises a two-part sheet of flexible insulative polymer with buses formed on one side. In another embodiment, the connector comprises multiple buses formed from conductive polymer. In further embodiments, the primary packages are stacked within a cage and have their outer leads in unattached contact with buses within the cage or, alternatively, are directly fixed to leads or pads on the host circuit board.

Inventors

  • 👤 Walter L. Moden
  • 👤 Jerrold L. King
  • 👤 Jerry M. Brooks

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-07 04:07
CPC Classifications
H; H05; H05K; H05K1/00; H05K1/18; H05K1/181; H10; H10W; H10W90/00; H05K1/02; H05K1/14; H05K1/145; H05K1/147; H05K2201/00; H05K2201/04; H05K2201/049; H05K2201/10; H05K2201/10431; H05K2201/10507; H05K2201/10515; H05K2201/10613; H05K2201/10621; H05K2201/10689; H10W70/00; H10W70/40; H10W70/60; H10W72/00; H10W72/801; H10W90/20; H10W90/288; Y; Y02; Y02P; Y02P70/00; Y02P70/50; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/49126; Y10T29/4913; Y10T29/49169

Claims Analysis

Total Claims: 64
Claim 1
Independent Claim 275 words
A package comprising: a substrate having a plurality of circuits; a plurality of encapsulated semiconductor devices, each encapsulatedsemiconductor device having an upper surface, a lower surface, a first lateral edge located between said upper surface and said lower surface, a second lateral edge located between said upper surface and said lower surface, and a plurality of outer leads extending from said first lateral edge and said second lateral edge; a cage for partially enclosing and retaining said plurality of encapsulated semiconductor devices in a stack, said cage having a wall located adjacent said plurality of encapsulated semiconductor devices in said stack, said cage including: a flexible member generally perpendicular to said upper surface and said lower surface of said encapsulated semiconductor device of said stacked plurality of encapsulated semiconductor devices, said flexible member comprising a layer of material on an inner surface of a portion of said cage, a second flexible member overlying said layer of material attached thereto, and at least one node on an interior of said cage wall adjacent said plurality of encapsulated semiconductor devices retaining said plurality of encapsulated semiconductor devices in said stack in said cage, said at least one node comprising a removable polymeric adhesive attaching said plurality of encapsulated semiconductor devices in said stack to said cage; and a conductive bus line formed on said flexible member, said conductive bus line extending substantially perpendicular to said plurality of encapsulated semiconductor devices in said stack, contacting an equivalent outer lead of said plurality of outer leads of each encapsulated semiconductor device of said plurality of encapsulated semiconductor devices, and connecting to said at least one circuit of said substrate.
Claim 2
Dependent Claim 275 words
A package comprising: a substrate having a plurality of circuits; a plurality of encapsulated semiconductor devices, each encapsulatedsemiconductor device having an upper surface, a lower surface, a first lateral edge located between said upper surface and said lower surface, a second lateral edge located between said upper surface and said lower surface, and a plurality of outer leads extending from said first lateral edge and said second lateral edge; a cage for partially enclosing and retaining said plurality of encapsulated semiconductor devices in a stack, said cage having a wall located adjacent said plurality of encapsulated semiconductor devices in said stack, said cage including: a flexible member generally perpendicular to said upper surface and said lower surface of said encapsulated semiconductor device of said stacked plurality of encapsulated semiconductor devices, said flexible member comprising a layer of material on an inner surface of a portion of said cage, a second flexible member overlying said layer of material attached thereto, and at least one node on an interior of said cage wall adjacent said plurality of encapsulated semiconductor devices retaining said plurality of encapsulated semiconductor devices in said stack in said cage, said at least one node comprising a removable polymeric adhesive attaching said plurality of encapsulated semiconductor devices in said stack to said cage; and a conductive bus line formed on said flexible member, said conductive bus line extending substantially perpendicular to said plurality of encapsulated semiconductor devices in said stack, contacting an equivalent outer lead of said plurality of outer leads of each encapsulated semiconductor device of said plurality of encapsulated semiconductor devices, and connecting to said at least one circuit of said substrate.
Claim 3
Dependent Claim 61 words
The package of claim 1 , further comprising a plurality of adhesive layers joining an adjacent upper surface and lower surface of each encapsulated semiconductor device of said plurality of encapsulated semiconductor devices to one another and one of said upper surface and said lower surface of said encapsulated semiconductor device of said plurality of encapsulated semiconductor devices to said substrate.
Claim 4
Dependent Claim 58 words
The package of claim 2 , wherein said plurality of encapsulated semiconductor devices comprises a plurality of stacked encapsulated semiconductor devices, each semiconductor device of said plurality of stacked semiconductor devices joined to an adjacent stacked semiconductor device of said stacked plurality of encapsulated semiconductor devices and to said substrate by one of electrically nonconductive tape and adhesive.
Claim 5
Dependent Claim 43 words
The package of claim 1 , wherein at least one outer outer of said plurality of outer leads of said each encapsulated semiconductor device of said plurality of encapsulated semiconductor devices in said stack includes a solder connection to said conductive bus line.
Claim 6
Dependent Claim 43 words
The package of claim 1 , wherein at least one outer lead of said plurality of outer leads of said each encapsulated semiconductor device of said plurality of encapsulated semiconductor devices in said stack includes a conductive connection to said conductive bus line.
Claim 7
Dependent Claim 21 words
The package of claim 1 , wherein said substrate comprises a circuit board having at least one electrical lead formed thereon.
Claim 8
Dependent Claim 50 words
The package of claim 1 , wherein said flexible member comprises a nonconductive polymer formed as a sheet with said conductive bus line joined to said sheet, said conductive bus line connected to said plurality of outer leads and having a portion thereof connected to a portion of said substrate.
Claim 9
Dependent Claim 14 words
The package of claim 7 , wherein said conductive bus line comprises a wire.
Claim 10
Dependent Claim 28 words
The package of claim 7 , wherein said conductive bus line comprises a wire having a cross-section including a projection for attachment to said sheet using an adhesive.
Claim 11
Dependent Claim 22 words
The package of claim 7 , wherein said conductive bus line comprises a wire having a projection for insertion into said sheet.
Claim 12
Dependent Claim 18 words
The package of claim 7 , wherein said conductive bus line joins to a surface of said sheet.
Claim 13
Dependent Claim 27 words
The package of claim 7 , wherein said conductive bus line joins to an electrical lead of said substrate by one of solder and a conductive polymer.
Claim 14
Dependent Claim 15 words
The package of claim 7 , wherein said nonconductive polymer of said sheet comprises polyimide.
Claim 15
Dependent Claim 31 words
The package of claim 7 , wherein said sheet includes a semicontinuous tape comprising a flexible polymeric layer having a plurality of parallel conductive transverse buses formed on one side thereof.
Claim 16
Dependent Claim 19 words
The package of claim 7 , wherein said conductive bus line comprises conductive wire adhesively joined to said sheet.
Claim 17
Dependent Claim 20 words
The package of claim 2 , wherein said plurality of encapsulated semiconductor devices comprises at least four encapsulated semiconductor devices.
Claim 18
Dependent Claim 47 words
The package of claim 1 , wherein said flexible member comprises a conductive bus line formed of conductive polymer on said plurality of encapsulated semiconductor devices adhesively joining at least one equivalent outer lead of said plurality of outer leads to each other and to said substrate.
Claim 19
Dependent Claim 14 words
The package of claim 17 , wherein said conductive polymer comprises a metal-filled polymer.
Claim 20
Dependent Claim 16 words
The package of claim 17 , wherein said conductive polymer comprises epoxy filled with silver particles.
Claim 21
Dependent Claim 15 words
The package of claim 17 , wherein said conductive polymer comprises a doped organic polymer.
Claim 22
Dependent Claim 19 words
The package of claim 20 , wherein said conductive polymer comprises one of doped polyacetylene, polypyrrole, polythiophene and polyaniline.
Claim 23
Dependent Claim 19 words
The package of claim 1 , wherein said cage comprises panels substantially perpendicular to a surface of said substrate.
Claim 24
Dependent Claim 32 words
The package of claim 22 , wherein said panels include two coplanar panels separated by a gap, said coplanar panels contacting and compressing said plurality of encapsulated semiconductor devices in said stack.
Claim 25
Dependent Claim 38 words
The package of claim 1 , wherein said cage is configured to retain said stack of encapsulated semiconductor devices, each encapsulated semiconductor device having a plurality of leads extending from said first lateral edge and second lateral edge.
Claim 26
Dependent Claim 67 words
The package of claim 1 , wherein said plurality of outer leads of each encapsulated semiconductor device of said plurality of encapsulated semiconductor devices includes a bent plurality of leads having a plurality of compressible lead ends for compressing said lead ends against said conductive bus line to retain each encapsulated semiconductor device of said plurality of encapsulated semiconductor devices within the cage by compression and friction.
Claim 27
Dependent Claim 18 words
The package of claim 1 , wherein said cage is formed of one of metal, polymer, and ceramic.
Claim 28
Dependent Claim 35 words
The package of claim 1 , further comprising: at least one node on an interior cage wall adjacent said plurality of encapsulated semiconductor devices to retain said plurality of encapsulated semiconductor devices in said cage.
Claim 29
Dependent Claim 36 words
The package of claim 27 , wherein said at least one node is a rib parallel to one of said upper surface and said lower surface of said plurality of encapsulated semiconductor devices in said stack.
Claim 30
Dependent Claim 23 words
The package of claim 1 , wherein said plurality of encapsulated semiconductor devices in said stack comprises at least two encapsulated semiconductor devices.
Claim 31
Dependent Claim 23 words
The package of claim 1 , wherein said plurality of encapsulated semiconductor devices in said stack comprises at least four encapsulated semiconductor devices.
Claim 32
Dependent Claim 23 words
The package of claim 1 , wherein said plurality of encapsulated semiconductor devices in said stack comprises at least eight encapsulated semiconductor devices.
Claim 33
Dependent Claim 228 words
A semiconductor device package, comprising: a substrate having circuits thereon; a stacked plurality of packaged encapsulated semiconductor devices, each packaged encapsulated semiconductor device having an upper major surface and a lower major surface having lateral edges therebetween and a plurality of outer leads extending from said lateral edges; a cage of members for partially enclosing and retaining said stacked plurality of packaged encapsulated semiconductor devices in a stack, said cage including: a layer of material on an inner surface of one of said members, a flexible member overlying said layer of material attached thereto, and at least one node on an interior of a connected member adjacent said stacked plurality of packaged encapsulated semiconductor devices in said cage, said at least one node comprising a rib substantially parallel to one of said upper major surface and said lower major surface of one semiconductor device of said plurality of packaged encapsulated semiconductor devices, said rib comprising a removable polymeric adhesive for attaching said semiconductor device to said cage; and conductive bus line formed on said flexible member, said conductive bus line generally perpendicular to said upper and lower major surfaces of each of said stacked plurality of packaged encapsulated semiconductor devices and contacting said plurality of outer leads of each of said stacked plurality of packaged encapsulated semiconductor devices connected to a circuit of said circuits of said substrate.
Claim 34
Dependent Claim 228 words
A semiconductor device package, comprising: a substrate having circuits thereon; a stacked plurality of packaged encapsulated semiconductor devices, each packaged encapsulated semiconductor device having an upper major surface and a lower major surface having lateral edges therebetween and a plurality of outer leads extending from said lateral edges; a cage of members for partially enclosing and retaining said stacked plurality of packaged encapsulated semiconductor devices in a stack, said cage including: a layer of material on an inner surface of one of said members, a flexible member overlying said layer of material attached thereto, and at least one node on an interior of a connected member adjacent said stacked plurality of packaged encapsulated semiconductor devices in said cage, said at least one node comprising a rib substantially parallel to one of said upper major surface and said lower major surface of one semiconductor device of said plurality of packaged encapsulated semiconductor devices, said rib comprising a removable polymeric adhesive for attaching said semiconductor device to said cage; and conductive bus line formed on said flexible member, said conductive bus line generally perpendicular to said upper and lower major surfaces of each of said stacked plurality of packaged encapsulated semiconductor devices and contacting said plurality of outer leads of each of said stacked plurality of packaged encapsulated semiconductor devices connected to a circuit of said circuits of said substrate.
Claim 35
Dependent Claim 47 words
The package of claim 32 , further comprising: a plurality of adhesive layers joining adjacent opposed upper and lower major surfaces of said stacked plurality of packaged encapsulated semiconductor devices to each other and joining one of said opposed upper and lower major surfaces to said substrate.
Claim 36
Dependent Claim 35 words
The package of claim 33 , wherein each of said stacked plurality of packaged encapsulated semiconductor devices is joined to each other and to said substrate by one of electrically nonconductive tape and an adhesive.
Claim 37
Dependent Claim 21 words
The package of claim 32 , wherein said substrate comprises a circuit board having a plurality of electrical leads formed thereon.
Claim 38
Dependent Claim 46 words
The package of claim 32 , wherein said flexible member comprises a nonconductive polymer formed as a sheet with said conductive bus line joined to said sheet, said conductive bus line joined to said plurality of outer leads and having a terminal joinable to said substrate.
Claim 39
Dependent Claim 14 words
The package of claim 32 , wherein said conductive bus line comprises a wire.
Claim 40
Dependent Claim 27 words
The package of claim 36 , wherein said conductive bus line comprises a wire having a cross-section including a projection for attachment to said sheet using adhesive.
Claim 41
Dependent Claim 27 words
The package of claim 36 , wherein said conductive bus line comprises a wire having a projection configured for insertion at an elevated temperature into said sheet.
Claim 42
Dependent Claim 19 words
The package of claim 36 , where in said conductive bus line joins to one surface of said sheet.
Claim 43
Dependent Claim 36 words
The package of claim 36 , wherein said conductive bus terminal includes attachment of at least one outer lead of said plurality of outer leads to said substrate by one of solder and a conductive polymer.
Claim 44
Dependent Claim 15 words
The package of claim 36 , wherein said nonconductive polymer of said sheet comprises polyimide.
Claim 45
Dependent Claim 32 words
The package of claim 36 , wherein said sheet includes a semi-continuous tape comprising a flexible polymeric layer with a plurality of parallel, conductive, substantially transverse buses formed on one side thereof.
Claim 46
Dependent Claim 19 words
The package of claim 36 , wherein said conductive bus line comprises conductive wire adhesively joined to said sheet.
Claim 47
Dependent Claim 21 words
The package of claim 32 , wherein said stacked plurality of packaged encapsulated semiconductor devices comprises at least four semiconductor devices.
Claim 48
Dependent Claim 46 words
The package of claim 32 , wherein said flexible member comprises a conductive bus line formed of conductive polymer on said plurality of packaged encapsulated semiconductor devices adhesively joining said plurality of outer leads to each other and to said plurality of circuits of said substrate.
Claim 49
Dependent Claim 14 words
The package of claim 46 , wherein said conductive polymer comprises a metal-filled polymer.
Claim 50
Dependent Claim 16 words
The package of claim 46 , wherein said conductive polymer comprises epoxy filled with silver particles.
Claim 51
Dependent Claim 15 words
The package of claim 46 , wherein said conductive polymer comprises a doped organic polymer.
Claim 52
Dependent Claim 19 words
The package of claim 46 , wherein said conductive polymer comprises one of doped polyacetylene, polypyrrole, polythiophene and polyaniline.
Claim 53
Dependent Claim 22 words
The package of claim 32 , wherein said members of said cage comprise panels substantially perpendicular to a surface of said substrate.
Claim 54
Dependent Claim 34 words
The package of claim 32 , wherein said members forming said cage include two coplanar panels separated by a gap, said coplanar panels contacting said stacked plurality of packaged encapsulated semiconductor devices in compression.
Claim 55
Dependent Claim 33 words
The package of claim 32 , wherein said cage retains a stack of said stacked plurality of packaged encapsulated semiconductor devices having outer leads extending from at least one of said lateral edges.
Claim 56
Dependent Claim 56 words
The package of claim 32 , wherein said outer leads of said plurality of outer leads of said plurality of packaged encapsulated semiconductor devices are bent forming compressible lead ends for compressing against said conductive bus line to retain each packaged encapsulated semiconductor device of said stacked plurality of packaged encapsulated semiconductor devices within said cage.
Claim 57
Dependent Claim 16 words
The package of claim 32 , wherein said cage comprises one of metal, polymer, and ceramic.
Claim 58
Dependent Claim 21 words
The package of claim 32 , wherein said stacked plurality of packaged encapsulated semiconductor devices comprises at least two semiconductor devices.
Claim 59
Dependent Claim 21 words
The package of claim 32 , wherein said stacked plurality of packaged encapsulated semiconductor devices comprises at least four semiconductor devices.
Claim 60
Dependent Claim 21 words
The package of claim 32 , wherein said stacked plurality of packaged encapsulated semiconductor devices comprises at least eight semiconductor devices.
Claim 61
Dependent Claim 237 words
A package for high-speed semiconductor devices, comprising: a substrate having circuits thereon; a stacked plurality of packaged encapsulated semiconductor devices, each packaged encapsulated semiconductor device having opposed major upper and lower surfaces having lateral edges therebetween and a plurality of outer leads extending from said lateral edges; a cage of members partially enclosing and retaining said stacked plurality of packaged encapsulated semiconductor devices; a flexible member generally perpendicular to said opposed major upper and lower surfaces, said flexible member comprising a layer of material on an inner surface of one of said cage flexible members and another flexible member overlying said layer of material attached thereto; a conductive bus line formed on said flexible member, said conductive bus line generally perpendicular to said opposed major upper and lower surfaces of said stacked plurality of packaged encapsulated semiconductor devices, contacting said plurality of outer leads of each of said stacked plurality of packaged encapsulated semiconductor devices, and connected to said circuits said substrate; and at least one node on an interior wall of said cage adjacent a semiconductor device of said stacked plurality of packaged encapsulated semiconductor devices retaining said semiconductor device in said cage, said at least one node comprising a rib substantially parallel to a major surface of said major upper and lower surfaces of said semiconductor device, said rib comprising a removable polymeric adhesive fixing said plurality of packaged encapsulated semiconductor devices to said cage.
Claim 62
Dependent Claim 237 words
A package for high-speed semiconductor devices, comprising: a substrate having circuits thereon; a stacked plurality of packaged encapsulated semiconductor devices, each packaged encapsulated semiconductor device having opposed major upper and lower surfaces having lateral edges therebetween and a plurality of outer leads extending from said lateral edges; a cage of members partially enclosing and retaining said stacked plurality of packaged encapsulated semiconductor devices; a flexible member generally perpendicular to said opposed major upper and lower surfaces, said flexible member comprising a layer of material on an inner surface of one of said cage flexible members and another flexible member overlying said layer of material attached thereto; a conductive bus line formed on said flexible member, said conductive bus line generally perpendicular to said opposed major upper and lower surfaces of said stacked plurality of packaged encapsulated semiconductor devices, contacting said plurality of outer leads of each of said stacked plurality of packaged encapsulated semiconductor devices, and connected to said circuits said substrate; and at least one node on an interior wall of said cage adjacent a semiconductor device of said stacked plurality of packaged encapsulated semiconductor devices retaining said semiconductor device in said cage, said at least one node comprising a rib substantially parallel to a major surface of said major upper and lower surfaces of said semiconductor device, said rib comprising a removable polymeric adhesive fixing said plurality of packaged encapsulated semiconductor devices to said cage.
Claim 63
Dependent Claim 241 words
A package for high-speed semiconductor devices, comprising: a substrate having circuits thereon; a stacked plurality of encapsulated semiconductor device packages, each encapsulated semiconductor device package having opposed major upper and lower surfaces having lateral edges therebetween and a plurality of outer leads extending from said lateral edges; a cage of members for partially enclosing and retaining said stacked plurality of encapsulated semiconductor device packages in a stack; a flexible member generally perpendicular to said opposed major upper and lower surfaces, said flexible member comprising a layer of material on an inner surface of one of said flexible members and another flexible member overlying said layer of material and attached thereto; a conductive bus line formed on said flexible member, said conductive bus line generally perpendicular to said opposed major upper and lower surfaces of said stacked plurality of encapsulated semiconductor device packages, contacting said plurality of outer leads of each of said stacked plurality of encapsulated semiconductor device packages and connected to said circuits of said substrate; and at least one node on an interior wall of said cage adjacent a semiconductor device package of said plurality of encapsulated semiconductor device packages retaining said semiconductor device package in said cage, said at least one node comprising a rib substantially parallel to a major surface of said major upper and lower surfaces of said semiconductor device package, said rib comprising a removable polymeric adhesive attaching said semiconductor device package to said cage.
Claim 64
Dependent Claim 241 words
A package for high-speed semiconductor devices, comprising: a substrate having circuits thereon; a stacked plurality of encapsulated semiconductor device packages, each encapsulated semiconductor device package having opposed major upper and lower surfaces having lateral edges therebetween and a plurality of outer leads extending from said lateral edges; a cage of members for partially enclosing and retaining said stacked plurality of encapsulated semiconductor device packages in a stack; a flexible member generally perpendicular to said opposed major upper and lower surfaces, said flexible member comprising a layer of material on an inner surface of one of said flexible members and another flexible member overlying said layer of material and attached thereto; a conductive bus line formed on said flexible member, said conductive bus line generally perpendicular to said opposed major upper and lower surfaces of said stacked plurality of encapsulated semiconductor device packages, contacting said plurality of outer leads of each of said stacked plurality of encapsulated semiconductor device packages and connected to said circuits of said substrate; and at least one node on an interior wall of said cage adjacent a semiconductor device package of said plurality of encapsulated semiconductor device packages retaining said semiconductor device package in said cage, said at least one node comprising a rib substantially parallel to a major surface of said major upper and lower surfaces of said semiconductor device package, said rib comprising a removable polymeric adhesive attaching said semiconductor device package to said cage.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2005-11-25 2006-05-27 2006-11-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2009-11-25 2010-05-27 2010-11-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2013-11-25 2014-05-27 2014-11-26 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag