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US5835988A Expired / Lapsed US ⏱️ 0.0 years remaining

Packed semiconductor device with wrap around external leads

Assignee: Mitsubishi Electric Corp
•
Filing: 1996-10-24
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Granted: 1998-11-10
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Expires: 2016-10-24
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Abstract

Abstract A semiconductor device with reduced thickness, improved heat radiation, and a stacked structure. Molded resin covers an IC chip wire and part of a die pad. The die pad is exposed from the molded resin. An external lead in the same plane as the exposed surface of the die pad extends to a side of the resin opposite the die pad and along the molded resin. This structure allows a reduction in thickness of the semiconductor device, the exposed die pad improves heat radiation, and the external lead on upper and lower surfaces of the resin allows the semiconductor devices to be stacked.

Inventors

  • 👤 Hideki Ishii

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 13:27
CPC Classifications
H; H10; H10W; H10W74/00; H10W74/10; H10W74/111; H10W72/00; H10W70/00; H10W70/40; H10W70/421; H10W70/424; H10W70/427; H10W70/429; H10W90/00; H10W70/60; H10W72/50; H10W72/541; H10W72/5449; H10W72/551; H10W72/552; H10W72/5522; H10W72/90; H10W72/931; H10W72/932; H10W90/701; H10W90/721; H10W90/722; H10W90/751; H10W90/756

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 138 words
A semiconductor device comprising: a semiconductor integrated circuit chip; a connection plate having a first main surface on which said semiconductor integrated circuit chip is mounted and a second main surface opposite the first main surface; a semiconductor device package body having side surfaces transverse to the second main surface and a first surface directly opposite the first main surface of said connecting plate, encapsulating said semiconductor integrated circuit and covering said first main surface of said connection plate not covered by said integrated circuit chip, wherein the second main surface of said connection plate is exposed from said package body; and an external terminal electrically connected to said integrated circuit chip, partially coplanar with said connection plate, contacting a side surface of said package body, and extending to and contacting the first surface of said package body.
Claim 2
Dependent Claim 138 words
A semiconductor device comprising: a semiconductor integrated circuit chip; a connection plate having a first main surface on which said semiconductor integrated circuit chip is mounted and a second main surface opposite the first main surface; a semiconductor device package body having side surfaces transverse to the second main surface and a first surface directly opposite the first main surface of said connecting plate, encapsulating said semiconductor integrated circuit and covering said first main surface of said connection plate not covered by said integrated circuit chip, wherein the second main surface of said connection plate is exposed from said package body; and an external terminal electrically connected to said integrated circuit chip, partially coplanar with said connection plate, contacting a side surface of said package body, and extending to and contacting the first surface of said package body.
Claim 3
Dependent Claim 38 words
The semiconductor device according to claim 1 wherein said package body extends at the first surface so that said external terminal at the first surface of said package body is coplanar with a surface of said package body.
Claim 4
Dependent Claim 47 words
The semiconductor device according to claim 1 wherein said external terminal is spaced from said connecting plate at the second main surface by a gap and comprising a protecting material covering the gaps and part of said external terminal and connection plate at the second main surface.
Claim 5
Dependent Claim 29 words
The semiconductor device according to claim 1 comprising an electrically conducting connecting material for electrically connecting said external terminal to an external element and disposed on said external terminal.
Claim 6
Dependent Claim 16 words
The semiconductor device according to claim 1 wherein said external terminal has a widened connection portion.
Claim 7
Dependent Claim 33 words
The semiconductor device according to claim 1 including a plurality of side-by-side external terminals, each of said external terminals having a widened portion, respective widened portions of neighboring side-by-side external terminals being staggered.
Claim 8
Dependent Claim 21 words
The semiconductor device according to claim 1, further comprising a dummy terminal not electrically connected to said semiconductor integrated circuit chip.
Claim 9
Dependent Claim 169 words
A semiconductor device structure comprising: a plurality of semiconductor devices, each semiconductor device including: a semiconductor integrated circuit chip; a connection plate having a first main surface on which said semiconductor integrated circuit chip is mounted and a second main surface opposite the first main surface; a semiconductor device package body having side surfaces transverse to the second main surface and a first surface directly opposite the first main surface of said connecting plate and encapsulating said semiconductor integrated circuit and covering said first main surface of said connection plate not covered by said integrated circuit chip, wherein the second main surface of said connection plate is exposed from said package body; and an external terminal electrically connected to said integrated circuit chip, partially coplanar with said connection plate, contacting a respective side surface of said package body, and extending to and contacting the first surface of said package body, wherein said plurality of semiconductor devices are stacked with respective external terminals of adjacent semiconductor devices electrically connected together.
Claim 10
Dependent Claim 169 words
A semiconductor device structure comprising: a plurality of semiconductor devices, each semiconductor device including: a semiconductor integrated circuit chip; a connection plate having a first main surface on which said semiconductor integrated circuit chip is mounted and a second main surface opposite the first main surface; a semiconductor device package body having side surfaces transverse to the second main surface and a first surface directly opposite the first main surface of said connecting plate and encapsulating said semiconductor integrated circuit and covering said first main surface of said connection plate not covered by said integrated circuit chip, wherein the second main surface of said connection plate is exposed from said package body; and an external terminal electrically connected to said integrated circuit chip, partially coplanar with said connection plate, contacting a respective side surface of said package body, and extending to and contacting the first surface of said package body, wherein said plurality of semiconductor devices are stacked with respective external terminals of adjacent semiconductor devices electrically connected together.
Claim 11
Dependent Claim 33 words
The semiconductor device according to claim 8 comprising a frame disposed partially between adjacent pairs of said plurality of semiconductor devices, electrically connecting respective external terminals of said plurality of semiconductor devices together.

References Cited (Backward Citations)

JPS58164248A Cited
US4985749A Cited
JPH02310957A Cited
JPH04225545A Cited
JPH05190743A Cited
US5602420A Cited
DE4400341A1 Cited
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US5656856A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2001-11-09 2002-05-11 2002-11-10 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2005-11-09 2006-05-11 2006-11-10 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2009-11-09 2010-05-11 2010-11-10 $7700.00 Window Closed / Lapsed

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