Trench storage dynamic random access memory cell with vertical transfer device

Claim 2

A trench storing dynamic random access memory cell with vertical transfer device, comprising: deep trenches formed in a p type substrate having a lower portion partially filled with n+ polysilicon storage node electrode and surrounded by an n+ silicon storage plate; a vertical metal oxide semiconductor field effect transistor transfer device in an upper portion of said deep trenches; a collar isolation oxide in an upper portion of said deep trenches on a multiplicity of sidewalls of said deep trenches between an n+ buried strap diffusion of said metal oxide semiconductor field effect transistor and said n+ silicon storage plate; a recessed polysilicon gate conductor positioned within an upper portion of said deep trenches gating a p type silicon adjacent said deep trench and connecting an n+ bit line diffusion positioned above said p type silicon and said n+ buried strap diffusion; and a multiplicity of recessed active and passing word line conductors on an insulating layer above said deep trenches.

Claim 3

A trench storing dynamic random access memory cell with vertical transfer device comprising: deep trenches formed in an n type substrate having a lower portion partially filled with p type polysilicon storage node electrode and surrounded by a p type silicon storage plate; a vertical metal oxide semiconductor field effect transistor device in an upper portion of said deep trenches; a collar isolation oxide in an upper portion of said deep trenches on a multiplicity of sidewalls of said deep trenches between a p type buried strap diffusion of said metal oxide semiconductor field effect transistor and said p type silicon storage plate; a recessed polysilicon gate conductor positioned within an upper portion of said deep trenches gating an n type silicon adjacent said deep trench and connecting a p type bit line diffusion positioned above said n type silicon and said p type buried strap diffusion; and a multiplicity of recessed active and passing word line conductors on an insulating layer above said deep trenches.

Claim 4

A trench storing dynamic random access memory cell with vertical transfer device comprising: deep trenches formed in an n type substrate having a lower portion partially filled with p type polysilicon storage node electrode and surrounded by a p type silicon storage plate; a vertical metal oxide semiconductor field effect transistor device in an upper portion of said deep trenches; a collar isolation oxide in an upper portion of said deep trenches on a multiplicity of sidewalls of said deep trenches between a p type buried strap diffusion of said metal oxide semiconductor field effect transistor and said p type silicon storage plate; a recessed polysilicon gate conductor positioned within an upper portion of said deep trenches gating an n type silicon adjacent said deep trench and connecting a p type bit line diffusion positioned above said n type silicon and said p type buried strap diffusion; and a multiplicity of recessed active and passing word line conductors on an insulating layer above said deep trenches.