US5480838A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of manufacturing a semiconductor device having vertical transistor with tubular double-gate
Assignee: Mitsubishi Electric Corp
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Filing: 1994-11-04
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Granted: 1996-01-02
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Expires: 2014-11-04
Abstract
Abstract A semiconductor device allowing control of its threshold voltage without requiring change in the materials of its gate electrodes and suitable for high density integration is disclosed. The semiconductor device includes a p type monocrystalline silicon substrate 1 having a cylindrical portion with inner and outer surfaces and extending in a vertical direction. A first gate electrode 8 and a second gate electrode 10 are disposed at the inner surface and the outer surface of the cylindrical portion 2, respectively. A source/drain region 5 is formed on the top end of the cylindrical portion 2, while a source/drain region 3 is formed on the inner bottom surface of the cylindrical portion 2. Therefore, the cylindrical portion 2 can be utilized as a channel region of an MIS field effect transistor. The threshold voltage of the transistor can easily be controlled by applying separate voltages to the two gate electrodes, the first electrode and the second electrode.
Inventors
- 👤 Katsuyoshi Mitsui
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 22:09
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/611; H10B; H10B12/00; H10B12/30; H10B12/39; H10B12/395; H10D30/01; H10D30/021; H10D30/025; H10D30/601; H10D30/608; H10D30/63; H10D64/00; H10D64/20; H10D64/27; H10D64/311; H10D64/411; H10D64/511; H10D64/512; H10D64/513
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
140 words
A method of manufacturing a semiconductor device, comprising the steps of: forming a standing wall portion having inner and outer surfaces and extending in a tubular manner on a main surface of a semiconductor substrate of first type conductivity; forming a first tubular gate electrode on the inner surface of said standing wall portion with a first gate insulating film therebetween; forming a second tubular gate electrode on the outer surface of said standing wall portion with a second gate insulating film therebetween; forming a first source/drain region by implanting a first impurity of second type conductivity to the top end of said standing wall portion; and forming a second source/drain region by implanting a second impurity of the second type conductivity to the bottom surface of said semiconductor substrate surrounded by the inner surface of said standing wall portion.
Claim 2
Independent Claim
140 words
A method of manufacturing a semiconductor device, comprising the steps of: forming a standing wall portion having inner and outer surfaces and extending in a tubular manner on a main surface of a semiconductor substrate of first type conductivity; forming a first tubular gate electrode on the inner surface of said standing wall portion with a first gate insulating film therebetween; forming a second tubular gate electrode on the outer surface of said standing wall portion with a second gate insulating film therebetween; forming a first source/drain region by implanting a first impurity of second type conductivity to the top end of said standing wall portion; and forming a second source/drain region by implanting a second impurity of the second type conductivity to the bottom surface of said semiconductor substrate surrounded by the inner surface of said standing wall portion.
Claim 3
Dependent Claim
53 words
A method of manufacturing a semiconductor device as recited in claim 1, wherein said step of forming the standing wall portion includes a step of forming a cylindrical standing wall portion extending from the main surface of said semiconductor substrate in a direction approximately vertical to the main surface of said semiconductor substrate.
Claim 4
Independent Claim
170 words
A method of manufacturing a semiconductor device, comprising the steps of: forming a standing wall portion having inner and outer surfaces and extending in a tubular manner on a main surface of a semiconductor substrate of first type conductivity; forming a first tubular gate electrode on the inner surface of said standing wall portion with a first gate insulating film therebetween; forming a second tubular gate electrode on the outer surface of said standing wall portion with a second gate insulating film therebetween; forming a first source/drain region by implanting a first impurity of second type conductivity to the top end of said standing wall portion; forming a second source/drain region by implanting a second impurity of the second type conductivity to the bottom surface of said semiconductor substrate surrounded by the inner surface of said standing wall portion; forming a capacitor lower electrode to be electrically connected to said second source/drain region; and forming a capacitor upper electrode on said capacitor lower electrode with a capacitor insulating film therebetween.
Claim 5
Independent Claim
170 words
A method of manufacturing a semiconductor device, comprising the steps of: forming a standing wall portion having inner and outer surfaces and extending in a tubular manner on a main surface of a semiconductor substrate of first type conductivity; forming a first tubular gate electrode on the inner surface of said standing wall portion with a first gate insulating film therebetween; forming a second tubular gate electrode on the outer surface of said standing wall portion with a second gate insulating film therebetween; forming a first source/drain region by implanting a first impurity of second type conductivity to the top end of said standing wall portion; forming a second source/drain region by implanting a second impurity of the second type conductivity to the bottom surface of said semiconductor substrate surrounded by the inner surface of said standing wall portion; forming a capacitor lower electrode to be electrically connected to said second source/drain region; and forming a capacitor upper electrode on said capacitor lower electrode with a capacitor insulating film therebetween.
Claim 6
Dependent Claim
45 words
A method of manufacturing a semiconductor device as recited in claim 3, wherein said step of forming the capacitor lower electrode includes a step of forming a tubular capacitor lower electrode extending in a direction approximately vertical to the main surface of said semiconductor substrate.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-01-01 | 1999-07-03 | 2000-01-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-01-01 | 2003-07-03 | 2004-01-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-01-01 | 2007-07-03 | 2008-01-02 | $7700.00 | Window Closed / Lapsed |