Methods of forming coaxial integrated circuitry interconnect lines

Claim 1

A method of forming coaxial integrated circuitry interconnect lines comprising: providing an n-type semiconductive substrate having front and back surfaces; forming a masking material over one of the front and back surfaces; forming a plurality of openings into the masking material; chemically etching pits into the one surface of the semiconductive substrate through the masking material openings; exposing the one surface to an electrolyte solution while isolating the other of the front and back surfaces from exposure to the electrolyte solution; during said exposing, illuminating the other of the front and back surfaces to chemically etch a plurality of holes through the semiconductive substrate from the pits to have aspect ratios of at least 100, the holes having sidewalls extending from the front surface to the back surface; after forming the holes, forming a masking layer over the front surface which exposes the holes; after forming the masking layer and with the masking layer in place, forming outer conductive coaxial line components by forming n+ diffusion regions through the sidewalls into the n-type semiconductive substrate to extend from the semiconductive substrate front surface to the semiconductive substrate back surface; forming coaxial dielectric material radially inward and over the diffusion regions within the holes to less than fill remaining volume of the holes and extend from the semiconductive substrate front surface to the semiconductive substrate back surface; after forming the coaxial dielectric material, depositing polysilicon to fill remaining volume of the holes radially inward of the coaxial dielectric material; after depositing the polysilicon, forming a metal layer over at least one of the front and back surfaces of the semiconductive substrate; and annealing the substrate at a temperature, and for a duration of time, which are effective to cause the metal layer to replace the polysilicon and form coaxial lines through the semiconductive substrate from the front surface to the back surface having aspect ratios of at least 100.

Claim 2

A method of forming coaxial integrated circuitry interconnect lines comprising: providing an n-type semiconductive substrate having front and back surfaces; forming a masking material over one of the front and back surfaces; forming a plurality of openings into the masking material; chemically etching pits into the one surface of the semiconductive substrate through the masking material openings; exposing the one surface to an electrolyte solution while isolating the other of the front and back surfaces from exposure to the electrolyte solution; during said exposing, illuminating the other of the front and back surfaces to chemically etch a plurality of holes through the semiconductive substrate from the pits to have aspect ratios of at least 100, the holes having sidewalls extending from the front surface to the back surface; after forming the holes, forming a masking layer over the front surface which exposes the holes; after forming the masking layer and with the masking layer in place, forming outer conductive coaxial line components by forming n+ diffusion regions through the sidewalls into the n-type semiconductive substrate to extend from the semiconductive substrate front surface to the semiconductive substrate back surface; forming coaxial dielectric material radially inward and over the diffusion regions within the holes to less than fill remaining volume of the holes and extend from the semiconductive substrate front surface to the semiconductive substrate back surface; after forming the coaxial dielectric material, depositing polysilicon to fill remaining volume of the holes radially inward of the coaxial dielectric material; after depositing the polysilicon, forming a metal layer over at least one of the front and back surfaces of the semiconductive substrate; and annealing the substrate at a temperature, and for a duration of time, which are effective to cause the metal layer to replace the polysilicon and form coaxial lines through the semiconductive substrate from the front surface to the back surface having aspect ratios of at least 100.