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US5166097A Expired / Lapsed US ⏱️ 0.0 years remaining

Silicon wafers containing conductive feedthroughs

Assignee: Boeing Co
•
Filing: 1990-11-26
•
Granted: 1992-11-24
•
Expires: 2010-11-26
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Abstract

Abstract Methods of forming electrically and/or thermally conductive feedthroughs in silicon wafers by etching a patterned silicon wafer, and formation of multichip modules utilizing silicon wafers having feedthroughs, are disclosed.

Inventors

  • 👤 Minas H. Tanielian

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 22:13
CPC Classifications
H; H10; H10P; H10P50/00; H10P50/60; H10P50/64; H10P50/642; H10P50/644; H10W; H10W20/00; H10W20/01; H10W20/021; H10W20/023; H10W20/20; H10W40/00; H10W40/40; H10W40/47; Y; Y10; Y10S; Y10S438/00; Y10S438/928

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 104 words
A method of forming electrically conductive feedthroughs in a silicon wafer, comprising: providing a patterned silicon wafer; anisotropically etching said wafer to produce a plurality of feedthroughs in said wafer, wherein said etching is carried out by a wet chemical etching technique applied simultaneously to both sides of said wafer, said both sides being patterned in substantially the same manner; coating an area of said wafer containing said feedthroughs with a dielectric layer to provide electrical isolation between said feedthroughs and said wafer; and metallizing said feedthroughs to thereby provide an electrical or thermal interconnection from one side of said wafer to the other.
Claim 2
Independent Claim 104 words
A method of forming electrically conductive feedthroughs in a silicon wafer, comprising: providing a patterned silicon wafer; anisotropically etching said wafer to produce a plurality of feedthroughs in said wafer, wherein said etching is carried out by a wet chemical etching technique applied simultaneously to both sides of said wafer, said both sides being patterned in substantially the same manner; coating an area of said wafer containing said feedthroughs with a dielectric layer to provide electrical isolation between said feedthroughs and said wafer; and metallizing said feedthroughs to thereby provide an electrical or thermal interconnection from one side of said wafer to the other.
Claim 3
Dependent Claim 19 words
The method of claim 1, wherein said wet chemical etching technique is carried out with aqueous alkali metal hydroxide.
Claim 4
Dependent Claim 17 words
The method of claim 1, wherein said etching is carried out at a temperature above room temperature.
Claim 5
Dependent Claim 28 words
The method of claim 1, wherein said dielectric layer is formed by oxidation of the silicon wafer or by deposition of silicon oxide or nitride on said wafer.
Claim 6
Dependent Claim 27 words
The method of claim 1, further comprising substantially filling said feedthroughs with a conductive metal paste and firing the paste to convert it to its metallic form.
Claim 7
Dependent Claim 28 words
The method of claim 1, wherein said feedthroughs are located in a peripheral region of said wafer that surrounds a central area of said wafer having no feedthroughs.
Claim 8
Dependent Claim 15 words
The method of claim 6, wherein said central area is sized to accommodate integrated circuitry.
Claim 9
Dependent Claim 22 words
The method of claim 6, further comprising etching away the central area of said wafer to thereby form a silicon wafer spacer.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-11-24 1996-05-25 1996-11-24 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-11-24 2000-05-25 2000-11-24 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2003-11-24 2004-05-25 2004-11-24 $7700.00 Window Closed / Lapsed

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