US6091258A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Redundancy circuitry for logic circuits
Assignee: Altera Corp
•
Filing: 1999-11-03
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Granted: 2000-07-18
•
Expires: 2019-11-03
Abstract
Abstract Redundant circuitry for a logic circuit such as a programmable logic device is provided. The redundant circuitry allows the logic circuit to be repaired by replacing a defective logic area on the circuit with a redundant logic circuit. Rows and columns of logic areas may be logically remapped by row and column swapping. The logic circuit contains dynamic control circuitry for directing programming data to various logic areas on the circuit in an order defined by redundancy configuration data. Redundancy may be implemented using either fully or partially redundant logic areas. Logic areas may be swapped to remap a partially redundant logic area onto a logic area containing a defect. The defect may then be repaired using row or column swapping or shifting. A logic circuit containing folded rows of logic areas may be repaired by replacing a defective half-row with a redundant half-row.
Inventors
- 👤 Cameron McClintock
- 👤 Andy L. Lee
- 👤 Richard G. Cliff
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 13:25
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/173; H03K19/177; H03K19/17748; H03K19/17764; G; G11; G11C; G11C29/00; G11C29/70; G11C29/78; G11C29/80; G11C29/808; H03K19/17724; H03K19/17728
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
128 words
A method for repairing a logic circuit that has a redundant programmable logic area and a plurality of normal programmable logic areas when it is determined that one of the normal programmable logic areas that is not immediately adjacent to the redundant programmable logic area is defective, the method comprising: supplying programming data to the logic circuit to program the logic circuit; and swapping the defective programmable logic area that is not immediately adjacent to the redundant programmable logic area with the redundant programmable logic area by routing the programming data to the programmable logic areas so that the programming data for the programmable logic area containing the defect that is not immediately adjacent to the redundant programmable logic area is routed to the redundant programmable logic area.
Claim 2
Independent Claim
128 words
A method for repairing a logic circuit that has a redundant programmable logic area and a plurality of normal programmable logic areas when it is determined that one of the normal programmable logic areas that is not immediately adjacent to the redundant programmable logic area is defective, the method comprising: supplying programming data to the logic circuit to program the logic circuit; and swapping the defective programmable logic area that is not immediately adjacent to the redundant programmable logic area with the redundant programmable logic area by routing the programming data to the programmable logic areas so that the programming data for the programmable logic area containing the defect that is not immediately adjacent to the redundant programmable logic area is routed to the redundant programmable logic area.
Claim 3
Dependent Claim
48 words
The method defined in claim 1 wherein the programmable logic areas are arranged in columns, the method further comprising swapping the defective programmable logic area and the redundant programmable logic area by routing the programming data to the columns of programmable logic areas using data path remapping circuitry.
Claim 4
Dependent Claim
32 words
The method defined in claim 1 wherein the logic areas are arranged in a plurality of rows, the method further comprising addressing the rows of logic areas using address line remapping circuitry.
Claim 5
Dependent Claim
28 words
The method defined in claim 1 wherein the logic areas are arranged in a plurality of rows, the method further comprising swapping two non-adjacent rows of logic areas.
Claim 6
Dependent Claim
22 words
The method defined in claim 1 further comprising storing the programming data in programming data storage circuits associated with the logic areas.
Claim 7
Dependent Claim
31 words
The method defined in claim 1 wherein the logic areas are arranged in rows and columns, the method further comprising swapping two given rows of the logic areas with remapping circuitry.
Claim 8
Dependent Claim
32 words
The method defined in claim 1 wherein the logic areas are logic super-regions arranged in columns, the method further comprising swapping two given non-adjacent columns of the logic super-regions with remapping circuitry.
Claim 9
Dependent Claim
33 words
The method defined in claim 1 wherein the logic areas are logic super-regions arranged in rows and columns, the method further comprising swapping two given columns of the logic super-regions with remapping circuitry.
Claim 10
Dependent Claim
33 words
The method defined in claim 1 wherein the logic areas are logic regions arranged in rows and columns, the method further comprising swapping two given rows of the logic regions with remapping circuitry.
Claim 11
Dependent Claim
33 words
The method defined in claim 1 wherein the logic areas are logic regions arranged in rows and columns, the method further comprising swapping two given columns of the logic regions with remapping circuitry.
Claim 12
Dependent Claim
75 words
The method defined in claim 1 wherein the logic areas are arranged in rows and columns having associated input/output connections, the method further comprising: swapping two given non-adjacent rows of the logic areas with remapping circuitry during programming of the circuit; and redirecting signals for the swapped non-adjacent rows during operation of the circuit with input/output routing circuitry so that the input/output connections to which the signals are provided are unaffected by swapping the rows.
Claim 13
Dependent Claim
75 words
The method defined in claim 1 wherein the logic areas are arranged in rows and columns having associated input/output connections, the method further comprising: swapping two given non-adjacent columns of the logic areas with remapping circuitry during programming of the circuit; and redirecting signals for the swapped non-adjacent columns during operation of the circuit with input/output routing circuitry so that the input/output connections to which the signals are provided are unaffected by swapping the columns.
Claim 14
Dependent Claim
50 words
The method defined in claim 1 further comprising: receiving the programming data with a plurality of data registers; providing the programming data to the logic areas with the data registers; and enabling the data registers with programming data dynamic routing control circuitry in an order determined by redundancy configuration data.
Claim 15
Dependent Claim
41 words
The method defined in claim 1 further comprising: storing the programming data in programming data storage circuits associated with the logic areas; and addressing the programming data storage circuits in each logic area in an order determined by redundancy configuration data.
Claim 16
Dependent Claim
65 words
The method defined in claim 1 wherein the logic areas are arranged in rows and columns having associated input/output connections, the method further comprising: providing the signals in each row and column to the input/output connections with input/output circuitry associated with each row and column; and swapping the input/output circuitry associated with two given non-adjacent rows of the logic areas during programming of the circuit.
Claim 17
Dependent Claim
64 words
The method defined in claim 1 wherein the logic areas are arranged in rows and columns having associated input/output connections, the method further comprising: providing the signals in each row and column to the input/output connections with input/output circuitry associated with each row and column; and swapping the input/output circuitry associated with two given columns of the logic areas during programming of the circuit.
Claim 18
Dependent Claim
34 words
The method defined in claim 1 wherein the logic areas are logic super-regions arranged in rows and columns, the method further comprising swapping two given non-adjacent columns of the logic super-regions by data remapping.
Claim 19
Dependent Claim
37 words
The method defined in claim 1 wherein the logic areas are logic super-regions arranged in rows and columns, the method further comprising the step of swapping two given non-adjacent rows of the logic super-regions by address remapping.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-07-18 | 2004-01-17 | 2004-07-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-07-18 | 2008-01-17 | 2008-07-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-07-18 | 2012-01-17 | 2012-07-18 | $7700.00 | Window Closed / Lapsed |