Parallel-shift error reconfiguration

Claim 1

A method for reconfiguring a parallel configuration of identical functional units in response to a failure of one of said units, said configuration comprising a rightmost unit serving as a spare, at least two input busses coupled to each of said units except for a leftmost and said rightmost units, and at least two output busses coupled to each of said units except for said leftmost and rightmost units, each of said input and output busses suitably coupled to at least two functional units, the method comprising the steps of: shifting the contents of the failed unit and the contents of all the units to the right of said failed unit one unit to the right; deactivating the outputs associated with said failed unit; activating the rightmost input bus associated with each unit for all of the units to the left of said failed unit; activating the leftmost input bus associated with each unit for all the units to the right of said failed unit; activating the rightmost output bus associated with each unit for all of the units to the left of said failed unit and activating the leftmost output bus associated with each unit for all of the units to the right of said failed unit; whereby said failed unit is operationally eliminated from said parallel configuration of identical functional units.

Claim 2

A method for reconfiguring a parallel configuration of identical functional units in response to a failure of one of said units, said configuration comprising a rightmost unit serving as a spare, at least two input busses coupled to each of said units except for a leftmost and said rightmost units, and at least two output busses coupled to each of said units except for said leftmost and rightmost units, each of said input and output busses suitably coupled to at least two functional units, the method comprising the steps of: shifting the contents of the failed unit and the contents of all the units to the right of said failed unit one unit to the right; deactivating the outputs associated with said failed unit; activating the rightmost input bus associated with each unit for all of the units to the left of said failed unit; activating the leftmost input bus associated with each unit for all the units to the right of said failed unit; activating the rightmost output bus associated with each unit for all of the units to the left of said failed unit and activating the leftmost output bus associated with each unit for all of the units to the right of said failed unit; whereby said failed unit is operationally eliminated from said parallel configuration of identical functional units.

Claim 3

A device having a parallel configuration of units for storing information that can be quickly reconfigured in response to a failure of one of said units comprising: a plurality of identical functional units, one of said plurality of identical functional units serving as a spare; a common address bus coupled to said plurality of identical functional units for selecting at least one location within said plurality of identical functional units where information is to be written in or read out; a plurality of input busses coupled to said plurality of identical functional units for routing information to said at least one location, at least two of said input busses each coupled to the same said functional units, each of said input busses switchably coupled to at least two of said functional units; a plurality of output busses coupled to said plurality of identical functional units for routing information from said at least one location, at least two of said output busses each coupled to the same said functional units, each of said output busses switchably coupled to at least two of said functional units; and a control means coupled to said plurality of identical functional units for operationally eliminating said failed functional unit from said parallel configuration by activating and deactivating certain of said plurality of input busses and certain of said plurality of output busses to shift the contents of said failed unit and the contents of all of said units between said failed unit and said spare unit one unit towards said spare unit in response to a failure of one of said functional units.

Claim 4

A device having a parallel configuration of units for storing information that can be quickly reconfigured in response to a failure of one of said units comprising: a plurality of identical functional units, one of said plurality of identical functional units serving as a spare; a common address bus coupled to said plurality of identical functional units for selecting at least one location within said plurality of identical functional units where information is to be written in or read out; a plurality of input busses coupled to said plurality of identical functional units for routing information to said at least one location, at least two of said input busses each coupled to the same said functional units, each of said input busses switchably coupled to at least two of said functional units; a plurality of output busses coupled to said plurality of identical functional units for routing information from said at least one location, at least two of said output busses each coupled to the same said functional units, each of said output busses switchably coupled to at least two of said functional units; and a control means coupled to said plurality of identical functional units for operationally eliminating said failed functional unit from said parallel configuration by activating and deactivating certain of said plurality of input busses and certain of said plurality of output busses to shift the contents of said failed unit and the contents of all of said units between said failed unit and said spare unit one unit towards said spare unit in response to a failure of one of said functional units.

Claim 5

A method for reconfiguring a parallel configuration of identical functional units in response to a failure of one of said units, said configuration comprising a leftmost unit serving as a spare, at least two input busses coupled to each of said units except for said leftmost and rightmost units, and at least two output busses coupled to each of said units except for said leftmost and rightmost units, each of said input and output busses switchably coupled to at least two functional units, the method comprising the steps of: shifting the contents of the failed unit and the contents of all the units to the left of said failed unit one unit to the left; deactivating the outputs associated with said failed unit; activating the rightmost input bus associated with each unit for all of the units to the left of said failed unit; activating the leftmost input bus associated with each unit for all of the units to the right of said failed unit; activating the rightmost output bus associated with each unit for all of the units to the left of said failed unit and activating the leftmost output bus associated with each unit for all of the units to the right of said failed unit whereby said failed unit is operationally eliminated from said parallel configuration of identical functional units.

Claim 6

A method for reconfiguring a parallel configuration of identical functional units in response to a failure of one of said units, said configuration comprising a leftmost unit serving as a spare, at least two input busses coupled to each of said units except for said leftmost and rightmost units, and at least two output busses coupled to each of said units except for said leftmost and rightmost units, each of said input and output busses switchably coupled to at least two functional units, the method comprising the steps of: shifting the contents of the failed unit and the contents of all the units to the left of said failed unit one unit to the left; deactivating the outputs associated with said failed unit; activating the rightmost input bus associated with each unit for all of the units to the left of said failed unit; activating the leftmost input bus associated with each unit for all of the units to the right of said failed unit; activating the rightmost output bus associated with each unit for all of the units to the left of said failed unit and activating the leftmost output bus associated with each unit for all of the units to the right of said failed unit whereby said failed unit is operationally eliminated from said parallel configuration of identical functional units.

Claim 7

A method for reconfiguring a parallel configuration of identical functional units in response to a failure of one of said units, said configuration comprising a unit serving as a spare, at least two input busses coupled to each of said units except for the leftmost and rightmost units, and at least two output busses coupled to each of said units except for said leftmost and rightmost units, each of said input and output busses switchably coupled to at least two functional units, the method comprising the steps of: shifting the contents of the failed unit and the contents of all the units between the failed unit and a spare unit one unit towards said spare unit; deactivating the outputs associated with said failed unit; activating the rightmost input bus associated with each unit for all of the units to the left of said failed unit; activating the leftmost input bus associated with each unit for all of the units to the right of said failed unit; activating the rightmost output bus associated with each unit for all of the units to the left of said failed unit and activating the leftmost output bus associated with each unit for all of the units to the right of said failed unit whereby said failed unit is operationally eliminated from said parallel configuration of identical functional units.

Claim 8

A method for reconfiguring a parallel configuration of identical functional units in response to a failure of one of said units, said configuration comprising a unit serving as a spare, at least two input busses coupled to each of said units except for the leftmost and rightmost units, and at least two output busses coupled to each of said units except for said leftmost and rightmost units, each of said input and output busses switchably coupled to at least two functional units, the method comprising the steps of: shifting the contents of the failed unit and the contents of all the units between the failed unit and a spare unit one unit towards said spare unit; deactivating the outputs associated with said failed unit; activating the rightmost input bus associated with each unit for all of the units to the left of said failed unit; activating the leftmost input bus associated with each unit for all of the units to the right of said failed unit; activating the rightmost output bus associated with each unit for all of the units to the left of said failed unit and activating the leftmost output bus associated with each unit for all of the units to the right of said failed unit whereby said failed unit is operationally eliminated from said parallel configuration of identical functional units.

Claim 9

A device having a parallel configuration of units for storing information that can be quickly reconfigured in response to a failure of one of said units comprising: a plurality of identical functional units, one of said plurality of identical functional units serving as a spare; a common address bus coupled to said plurality of identical functional units for selecting at least one location within said plurality of identical functional units where information is to be written in or read out; a plurality of input busses coupled to said plurality of identical functional units for routing information to said at least one location, at least two of said input busses each coupled to the same said functional units, each of said input busses switchably coupled to at least two of said functional units; a plurality of output busses coupled to said plurality of identical functional units for routing information from said at least one location, at least two of said output busses each coupled to the same said functional units, each of said output busses switchably coupled to at least two of said functional units; and a reconfiguration control means independent of said common address bus and coupled to said plurality of identical functional units for operationally eliminating said failed functional unit from said parallel configuration by activating and deactivating at least one of said plurality of input busses and at least one of said plurality of output busses to shift the contents of said failed unit and the contents of all of said units between said failed unit and said spare unit one unit towards said spare unit in response to a failure of one of said functional units.

Claim 10

A device having a parallel configuration of units for storing information that can be quickly reconfigured in response to a failure of one of said units comprising: a plurality of identical functional units, one of said plurality of identical functional units serving as a spare; a common address bus coupled to said plurality of identical functional units for selecting at least one location within said plurality of identical functional units where information is to be written in or read out; a plurality of input busses coupled to said plurality of identical functional units for routing information to said at least one location, at least two of said input busses each coupled to the same said functional units, each of said input busses switchably coupled to at least two of said functional units; a plurality of output busses coupled to said plurality of identical functional units for routing information from said at least one location, at least two of said output busses each coupled to the same said functional units, each of said output busses switchably coupled to at least two of said functional units; and a reconfiguration control means independent of said common address bus and coupled to said plurality of identical functional units for operationally eliminating said failed functional unit from said parallel configuration by activating and deactivating at least one of said plurality of input busses and at least one of said plurality of output busses to shift the contents of said failed unit and the contents of all of said units between said failed unit and said spare unit one unit towards said spare unit in response to a failure of one of said functional units.

Claim 12

A device including a parallel configuration of units for storing information that can be quickly reconfigured in response to a failure of one of said units comprising: a plurality of identical functional units; one of said plurality of identical functional units serving as a spare, each of said plurality of identical functional units further comprising: at least one input bus for routing information to said each of said plurality of functional units, at least one output bus for routing information from said each of said plurality of identical functional units, and gating logic for activating and deactivating said at least one input bus and said at least one output bus; a reconfiguration control means coupled to said plurality of identical functional units for operationally eliminating said failed functional unit from said parallel configuration by activating said gating logic to activate said at least one input bus and said at least one output bus of said functional unit serving as a spare and deactivate said at least one input bus and said at least one output bus of said failed functional unit to shift the contents of said failed unit and the contents of all of said units between said failed unit and said spare unit one unit towards said spare unit in response to a failure of one of said functional units; and a common address bus independent of said gating logic and said reconfiguration control means and coupled to each of said plurality of identical functional units for selecting at least one location within said plurality of identical functional units for writing information into and reading information out of.

Claim 13

A device including a parallel configuration of units for storing information that can be quickly reconfigured in response to a failure of one of said units comprising: a plurality of identical functional units; one of said plurality of identical functional units serving as a spare, each of said plurality of identical functional units further comprising: at least one input bus for routing information to said each of said plurality of functional units, at least one output bus for routing information from said each of said plurality of identical functional units, and gating logic for activating and deactivating said at least one input bus and said at least one output bus; a reconfiguration control means coupled to said plurality of identical functional units for operationally eliminating said failed functional unit from said parallel configuration by activating said gating logic to activate said at least one input bus and said at least one output bus of said functional unit serving as a spare and deactivate said at least one input bus and said at least one output bus of said failed functional unit to shift the contents of said failed unit and the contents of all of said units between said failed unit and said spare unit one unit towards said spare unit in response to a failure of one of said functional units; and a common address bus independent of said gating logic and said reconfiguration control means and coupled to each of said plurality of identical functional units for selecting at least one location within said plurality of identical functional units for writing information into and reading information out of.

Claim 15

A device including a stacked configuration of levels of units for storing information that can be reconfigured in response to a failure of one of said units on each level of said stack; each level of said stack comprising: a plurality of identical functional units, one of said plurality of identical functional units serving as a spare; a plurality of input busses coupled to said plurality of identical functional units for routing information to said plurality of identical functional units, at least two of said input busses each coupled to the same said functional units, each of said input busses switchably coupled to at least two of said functional units; a plurality of output busses coupled to said plurality of identical functional units for routing information from said plurality of identical functional units, at least two of said output busses each coupled to the same said functional units, each of said output busses switchably coupled to at least two of said functional units; a common address bus coupled to said plurality of identical functional units for selecting at least one location within said plurality of identical functional units for writing information into and reading information out of; and a reconfiguration control means independent of said common address bus coupled to said plurality of identical functional units for operationally eliminating said failed functional unit from said stacked configuration by activating and deactivating at least one of said plurality of input busses and at least one said plurality of output busses to shift the contents of said failed unit and the contents of all of said units between said failed unit and said spare unit one unit towards said spare unit in response to a failure of one of said functional units.

Claim 16

A device including a stacked configuration of levels of units for storing information that can be reconfigured in response to a failure of one of said units on each level of said stack; each level of said stack comprising: a plurality of identical functional units, one of said plurality of identical functional units serving as a spare; a plurality of input busses coupled to said plurality of identical functional units for routing information to said plurality of identical functional units, at least two of said input busses each coupled to the same said functional units, each of said input busses switchably coupled to at least two of said functional units; a plurality of output busses coupled to said plurality of identical functional units for routing information from said plurality of identical functional units, at least two of said output busses each coupled to the same said functional units, each of said output busses switchably coupled to at least two of said functional units; a common address bus coupled to said plurality of identical functional units for selecting at least one location within said plurality of identical functional units for writing information into and reading information out of; and a reconfiguration control means independent of said common address bus coupled to said plurality of identical functional units for operationally eliminating said failed functional unit from said stacked configuration by activating and deactivating at least one of said plurality of input busses and at least one said plurality of output busses to shift the contents of said failed unit and the contents of all of said units between said failed unit and said spare unit one unit towards said spare unit in response to a failure of one of said functional units.

Claim 17

A device having a stacked configuration of levels of units for storing information that can be quickly reconfigured in response to a failure of one of said units on each level of said stack, each level of said stack comprising: a plurality of identical functional units; one of said plurality of identical functional units serving as a spare, each of said plurality of identical functional units further comprising: at least one input bus for routing information to said each of said plurality of identical functional units, at least one output bus for routing information from said each of said plurality of identical functional units, and gating logic for activating and deactivating said at least one input bus and said at least one output bus; a reconfiguration control means coupled to said plurality of identical functional units for operationally eliminating said failed functional unit from said parallel configuration by activating said gating logic to activate said at least one input bus and said at least one output bus of said functional unit serving as a spare and deactivate said at least one input bus and said at least one output bus of said failed functional unit to shift the contents of said failed unit and the contents of all of said units between said failed unit and said spare unit one unit towards said spare unit in response to a failure of one of said functional units; and a common address bus independent of said gating logic and said reconfiguration control means and coupled to said plurality of identical functional units for selecting at least one location within said plurality of identical functional units for writing information into and reading information out of.

Claim 18

A device having a stacked configuration of levels of units for storing information that can be quickly reconfigured in response to a failure of one of said units on each level of said stack, each level of said stack comprising: a plurality of identical functional units; one of said plurality of identical functional units serving as a spare, each of said plurality of identical functional units further comprising: at least one input bus for routing information to said each of said plurality of identical functional units, at least one output bus for routing information from said each of said plurality of identical functional units, and gating logic for activating and deactivating said at least one input bus and said at least one output bus; a reconfiguration control means coupled to said plurality of identical functional units for operationally eliminating said failed functional unit from said parallel configuration by activating said gating logic to activate said at least one input bus and said at least one output bus of said functional unit serving as a spare and deactivate said at least one input bus and said at least one output bus of said failed functional unit to shift the contents of said failed unit and the contents of all of said units between said failed unit and said spare unit one unit towards said spare unit in response to a failure of one of said functional units; and a common address bus independent of said gating logic and said reconfiguration control means and coupled to said plurality of identical functional units for selecting at least one location within said plurality of identical functional units for writing information into and reading information out of.