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Methods of forming a field effect transistor having source/drain material over insulative material

Assignee: Micron Technology Inc
•
Filing: 2002-08-15
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Granted: 2006-07-04
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Expires: 2022-08-15
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Abstract

Abstract In one implementation, a method of forming a field effect transistor includes etching an opening into source/drain area of a semiconductor substrate. The opening has a base comprising semiconductive material. After the etching, insulative material is formed within the opening over the semiconductive material base. The insulative material less than completely fills the opening and has a substantially uniform thickness across the opening. Semiconductive source/drain material is formed within the opening over the insulative material within the opening. A transistor gate is provided operatively proximate the semiconductive source/drain material. Other aspects and implementations are contemplated.

Inventors

  • 👤 Sanh D. Tang
  • 👤 Michael P. Violette
  • 👤 Robert Burke

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 22:23
CPC Classifications
G; G06; G06K; G06K19/00; G06K19/06; G06K19/067; G06K19/07; G06K19/0723; H; H10; H10D; H10D30/00; H10D30/60; H10D30/601; G06K19/0726; G06K19/077; G06K19/07749; G06K19/07771; H10D30/01; H10D30/021; H10D30/0223; H10D30/0225; H10D30/027; H10D30/0275; H10D30/608; H10D62/00; H10D62/01; H10D62/021; H10D62/10; H10D62/17; H10D62/351; H10D62/357; H10D62/364; H10D62/371; H10D64/00; H10D64/01; H10D64/017; H10D64/20; H10D64/23; H10D64/251; H10D64/258; H10D64/259; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/013; H10D84/0135; H10D84/0151; H10D84/0165; H10D84/017; H10D84/0172; H10D84/02; H10D84/03; H10D84/038; H10P; H10P90/00; H10P90/19; H10P90/1904; H10P90/1906; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/014; H10W10/0143; H10W10/0145; H10W10/061; H10W10/10; H10W10/17; H10W10/181

Claims Analysis

Total Claims: 20
Claim 1
Independent Claim 153 words
A method of forming a field effect transistor comprising: providing masking material over semiconductive material of a semiconductor substrate, the masking material masking at least a portion of a transistor channel area; while the masking material masks at least a portion of the transistor channel area, forming a lightly doped drain region within a source/drain area of semiconductive material of the semiconductor substrate; after forming the lightly doped drain region, etching an opening into the source/drain area of the semiconductor substrate, the opening having a base comprising semiconductive material; after the etching, forming insulative material within the opening over the semiconductive material base, the insulative material less than completely filling the opening and having a substantially uniform thickness across the opening; forming semiconductive source/drain material within the opening over the insulative material within the opening; and after forming the lightly doped drain region, providing a transistor gate operatively proximate the semiconductive source/drain material.
Claim 2
Independent Claim 153 words
A method of forming a field effect transistor comprising: providing masking material over semiconductive material of a semiconductor substrate, the masking material masking at least a portion of a transistor channel area; while the masking material masks at least a portion of the transistor channel area, forming a lightly doped drain region within a source/drain area of semiconductive material of the semiconductor substrate; after forming the lightly doped drain region, etching an opening into the source/drain area of the semiconductor substrate, the opening having a base comprising semiconductive material; after the etching, forming insulative material within the opening over the semiconductive material base, the insulative material less than completely filling the opening and having a substantially uniform thickness across the opening; forming semiconductive source/drain material within the opening over the insulative material within the opening; and after forming the lightly doped drain region, providing a transistor gate operatively proximate the semiconductive source/drain material.
Claim 3
Dependent Claim 22 words
The method of claim 1 wherein the semiconductor substrate comprises bulk semiconductive material, the opening being etched into the bulk semiconductive material.
Claim 4
Dependent Claim 33 words
The method of claim 1 wherein the method forms multiple field effect transistors, the opening being in the form of a channel spanning source/drain areas of a plurality of the field effect transistors.
Claim 5
Dependent Claim 56 words
The method of claim 1 comprising etching two of said openings for the transistor, forming said insulative material within the two openings, and forming said semiconductive source/drain material within the two openings over the insulative material received therein; the transistor gate being provided operatively proximate and between the semiconductive source/drain material formed in the two openings.
Claim 6
Dependent Claim 18 words
The method of claim 1 wherein forming the insulative material comprises depositing insulative material and etching it back.
Claim 7
Dependent Claim 30 words
The method of claim 1 wherein forming the insulative material comprises depositing insulative material and etching it back in a blanket manner without using a photoresist mask during said etching.
Claim 8
Dependent Claim 29 words
The method of claim 1 wherein forming the insulative material comprises depositing insulative material to overfill the opening, and etching it back to less than completely fill the opening.
Claim 9
Dependent Claim 17 words
The method of claim 1 wherein the insulative material has a thickness no greater than 1000 Angstroms.
Claim 10
Dependent Claim 17 words
The method of claim 1 wherein the insulative material has a thickness no greater than 600 Angstroms.
Claim 11
Dependent Claim 12 words
The method of claim 1 wherein the insulative material comprises silicon dioxide.
Claim 12
Dependent Claim 19 words
The method of claim 1 wherein the semiconductive source/drain material forms an elevated source/drain of the field effect transistor.
Claim 13
Dependent Claim 46 words
The method of claim 1 wherein, the semiconductor substrate comprises bulk semiconductive material, the opening being etched into the bulk semiconductive material; and forming the insulative material comprises depositing insulative material to overfill the opening, and etching it back to less than completely fill the opening.
Claim 14
Dependent Claim 17 words
The method of claim 12 wherein the insulative material has a thickness no greater than 1000 Angstroms.
Claim 15
Dependent Claim 17 words
The method of claim 12 wherein the insulative material has a thickness no greater than 600 Angstroms.
Claim 16
Dependent Claim 19 words
The method of claim 12 wherein the semiconductive source/drain material forms an elevated source/drain of the field effect transistor.
Claim 17
Dependent Claim 34 words
The method of claim 1 wherein forming the lightly doped drain region comprises doping a region of semiconductive material of the semiconductor substrate, the opening being etched through said doped region of semiconductive material.
Claim 18
Dependent Claim 20 words
The method of claim 1 wherein the transistor gate is provided after forming the semiconductive source/drain material within the opening.
Claim 19
Dependent Claim 15 words
The method of claim 1 wherein at least some of the masking material is sacrificial.
Claim 20
Dependent Claim 21 words
The method of claim 1 wherein all of the masking material is sacrificial and removed prior to providing the transistor gate.

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Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2009-07-03 2010-01-02 2010-07-04 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2013-07-03 2014-01-02 2014-07-04 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2017-07-03 2018-01-02 2018-07-04 $7700.00 Window Closed / Lapsed

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