US6300199B1
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Method of defining at least two different field effect transistor channel lengths using differently angled sidewall segments of a channel defining layer
Assignee: Micron Technology Inc
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Filing: 2000-05-24
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Granted: 2001-10-09
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Expires: 2020-05-24
Abstract
Abstract A method of defining at least two different field effect transistor channel lengths includes forming a channel defining layer over a substrate, the semiconductor substrate having a mean global outer surface extending along a plane. First and second openings are etched into the channel defining layer. The first and second openings respectively have a pair of opposing sidewalls having substantially straight linear segments which are angled from the plane. The straight linear segments of the opposing sidewalls of the first opening are angled differently from the plane than the straight linear segments of the opposing sidewalls of the second opening and are thereby of different lengths. Integrated circuitry includes a first field effect transistor and a second field effect transistor. The first and second field effect transistors have respective channel lengths defined along their gate dielectric layers and respectively have at least some portion which is substantially straight linear. The first and second channel lengths have different total lengths, both of the straight linear portions of the first and second channel lengths are angled from the plane, and at least one of the straight linear portions of the first and second channel lengths are beveled relative to the plane.
Inventors
- 👤 Alan R. Reinberg
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 10:16
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0135; H10D84/0142; H10D84/016; H10D84/02; H10D84/03; H10D84/038
Claims Analysis
Total Claims: 30
Claim 1
Independent Claim
106 words
A method of defining at least two different field effect transistor channel lengths comprising: forming a channel defining layer over a substrate, the semiconductor substrate having a mean global outer surface extending along a plane; and etching first and second openings into the channel defining layer, the first and second openings respectively having a pair of opposing sidewalls having substantially straight linear segments which are angled from the plane, the straight linear segments of the opposing sidewalls of the first opening being angled differently from the plane than the straight linear segments of the opposing sidewalls of the second opening and thereby being of different lengths.
Claim 2
Independent Claim
106 words
A method of defining at least two different field effect transistor channel lengths comprising: forming a channel defining layer over a substrate, the semiconductor substrate having a mean global outer surface extending along a plane; and etching first and second openings into the channel defining layer, the first and second openings respectively having a pair of opposing sidewalls having substantially straight linear segments which are angled from the plane, the straight linear segments of the opposing sidewalls of the first opening being angled differently from the plane than the straight linear segments of the opposing sidewalls of the second opening and thereby being of different lengths.
Claim 3
Dependent Claim
19 words
The method of claim 1 wherein etching of the first and second openings occurs in a common masking step.
Claim 4
Dependent Claim
25 words
The method of claim 1 wherein etching of the first and second openings occurs in a common masking step and during the same etching step(s).
Claim 5
Dependent Claim
21 words
The method of claim 1 wherein etching of the first and second openings occurs in a common masking step and simultaneously.
Claim 6
Dependent Claim
22 words
The method of claim 1 wherein the first and second openings are elongated in respective directions which are parallel with the plane.
Claim 7
Dependent Claim
25 words
The method of claim 1 wherein the first and second openings are elongated in respective directions which are parallel with the plane and each other.
Claim 8
Dependent Claim
47 words
The method of claim 1 wherein the straight linear segments of the pair of opposing sidewalls of the first opening are beveled relative to the plane and the straight linear segments of the pair of opposing sidewalls of the second opening are beveled relative to the plane.
Claim 9
Dependent Claim
40 words
The method of claim 1 wherein only one pair of the pair of opposing sidewalls of the first opening and the pair of opposing sidewalls of the second opening has straight linear segments which are beveled relative to the plane.
Claim 10
Dependent Claim
58 words
The method of claim 1 wherein the etching comprises forming a mask outwardly of the channel defining layer, the mask having a sloped resist sidewall, and etching the resist and channel defining layer to form at least one pair of the opposing sidewalls of the opening to have straight linear segments which are beveled relative to the plane.
Claim 11
Independent Claim
140 words
A method of forming a pair of field effect transistor channels having different channel lengths, comprising: forming a channel defining layer over a semiconductor substrate, the semiconductor substrate having a mean global outer surface extending along a plane; etching first and second openings into the channel defining layer, the first and second openings respectively having a pair of opposing sidewalls having substantially straight linear segments which are angled from the plane, the straight linear segments of the opposing sidewalls of the first opening being angled differently from the plane than the straight linear segments of the opposing sidewalls of the second opening and thereby being of different lengths; and forming semiconductive channel material within the first and second openings having differing channel lengths defined at least along the straight linear segments of the sidewalls of the first and second openings.
Claim 12
Independent Claim
140 words
A method of forming a pair of field effect transistor channels having different channel lengths, comprising: forming a channel defining layer over a semiconductor substrate, the semiconductor substrate having a mean global outer surface extending along a plane; etching first and second openings into the channel defining layer, the first and second openings respectively having a pair of opposing sidewalls having substantially straight linear segments which are angled from the plane, the straight linear segments of the opposing sidewalls of the first opening being angled differently from the plane than the straight linear segments of the opposing sidewalls of the second opening and thereby being of different lengths; and forming semiconductive channel material within the first and second openings having differing channel lengths defined at least along the straight linear segments of the sidewalls of the first and second openings.
Claim 13
Dependent Claim
19 words
The method of claim 10 wherein etching of the first and second openings occurs in a common masking step.
Claim 14
Dependent Claim
25 words
The method of claim 10 wherein etching of the first and second openings occurs in a common masking step and during the same etching step(s).
Claim 15
Dependent Claim
21 words
The method of claim 10 wherein etching of the first and second openings occurs in a common masking step and simultaneously.
Claim 16
Dependent Claim
58 words
The method of claim 10 wherein the etching comprises forming a mask outwardly of the channel defining layer, the mask having a sloped resist sidewall, and etching the resist and channel defining layer to form at least one pair of the opposing sidewalls of the opening to have straight linear segments which are beveled relative to the plane.
Claim 17
Independent Claim
198 words
A method of forming a pair of field effect transistors having different channel lengths, comprising: providing a semiconductor substrate having a mean global outer surface extending along a plane; forming a channel defining layer over the semiconductor substrate; etching first and second openings into the channel defining layer, the first and second openings respectively having a pair of opposing sidewalls having substantially straight linear segments which are angled from the plane, the straight linear segments of the opposing sidewalls of the first opening being angled differently from the plane than the straight linear segments of the opposing sidewalls of the second opening and thereby being of different lengths; forming semiconductive channel material within the first and second openings having differing channel lengths defined at least along the straight linear segments of the sidewalls of the first and second openings; forming a first source/drain region outwardly and operably proximate the semiconductive channel material; removing at least a portion of the channel defining layer to expose at least some of the semiconductive channel material; and forming respective gate dielectric layers and gates over the semiconductive channel material, and forming second source/drain region inwardly and operably proximate the semiconductive channel material.
Claim 18
Independent Claim
198 words
A method of forming a pair of field effect transistors having different channel lengths, comprising: providing a semiconductor substrate having a mean global outer surface extending along a plane; forming a channel defining layer over the semiconductor substrate; etching first and second openings into the channel defining layer, the first and second openings respectively having a pair of opposing sidewalls having substantially straight linear segments which are angled from the plane, the straight linear segments of the opposing sidewalls of the first opening being angled differently from the plane than the straight linear segments of the opposing sidewalls of the second opening and thereby being of different lengths; forming semiconductive channel material within the first and second openings having differing channel lengths defined at least along the straight linear segments of the sidewalls of the first and second openings; forming a first source/drain region outwardly and operably proximate the semiconductive channel material; removing at least a portion of the channel defining layer to expose at least some of the semiconductive channel material; and forming respective gate dielectric layers and gates over the semiconductive channel material, and forming second source/drain region inwardly and operably proximate the semiconductive channel material.
Claim 19
Dependent Claim
27 words
The method of claim 15 wherein the second source/drain region is formed prior to forming the channel defining layer and prior to forming the first source/drain region.
Claim 20
Dependent Claim
22 words
The method of claim 15 wherein the first and second openings are substantially enclosed and the gates surround the semiconductive channel material.
Claim 21
Dependent Claim
19 words
The method of claim 15 wherein etching of the first and second openings occurs in a common masking step.
Claim 22
Dependent Claim
25 words
The method of claim 15 wherein etching of the first and second openings occurs in a common masking step and during the same etching step(s).
Claim 23
Dependent Claim
21 words
The method of claim 15 wherein etching of the first and second openings occurs in a common masking step and simultaneously.
Claim 24
Dependent Claim
22 words
The method of claim 15 wherein the first and second openings are elongated in respective directions which are parallel with the plane.
Claim 25
Dependent Claim
25 words
The method of claim 15 wherein the first and second openings are elongated in respective directions which are parallel with the plane and each other.
Claim 26
Dependent Claim
13 words
The method of claim 15 wherein the channel defining layer is electrically insulative.
Claim 27
Dependent Claim
24 words
The method of claim 15 wherein the channel defining layer is electrically insulative and entirely removed from the substrate prior to forming the gates.
Claim 28
Dependent Claim
47 words
The method of claim 15 wherein the straight linear segments of the pair of opposing sidewalls of the first opening are beveled relative to the plane and the straight linear segments of the pair of opposing sidewalls of the second opening are beveled relative to the plane.
Claim 29
Dependent Claim
40 words
The method of claim 15 wherein only one pair of the pair of opposing sidewalls of the first opening and the pair of opposing sidewalls of the second opening has straight linear segments which are beveled relative to the plane.
Claim 30
Dependent Claim
58 words
The method of claim 15 wherein the etching comprises forming a mask outwardly of the channel defining layer, the mask having a sloped resist sidewall, and etching the resist and channel defining layer to form at least one pair of the opposing sidewalls of the opening to have sloped linear segments which are beveled relative to the plane.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2004-10-08 | 2005-04-09 | 2005-10-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2008-10-08 | 2009-04-09 | 2009-10-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2012-10-08 | 2013-04-09 | 2013-10-09 | $7700.00 | Window Closed / Lapsed |