Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
153 words
A method for fabricating a semiconductor device, comprising the steps of: (1) providing a semiconductor substrate of a first conductivity type; (2) defining a channel region and source/drain regions in the semiconductor substrate and etching the semiconductor substrate in the source/drain regions to a depth; (3) forming an insulating film on a surface of the semiconductor substrate and a first semiconductor layer on the insulating film; (4) etching the first semiconductor layer and the insulating film to expose the semiconductor substrate in the channel region; (5) forming a second semiconductor layer on an entire surface of the semiconductor substrate and the first semiconductor layer; (6) forming a gate insulating film on the second semiconductor layer; (7) forming a gate electrode on the gate insulating film over the channel region; and, (8) forming impurity regions of a second conductivity type in the first, and second semiconductor layers on both sides of the gate electrode.
Claim 2
Independent Claim
153 words
A method for fabricating a semiconductor device, comprising the steps of: (1) providing a semiconductor substrate of a first conductivity type; (2) defining a channel region and source/drain regions in the semiconductor substrate and etching the semiconductor substrate in the source/drain regions to a depth; (3) forming an insulating film on a surface of the semiconductor substrate and a first semiconductor layer on the insulating film; (4) etching the first semiconductor layer and the insulating film to expose the semiconductor substrate in the channel region; (5) forming a second semiconductor layer on an entire surface of the semiconductor substrate and the first semiconductor layer; (6) forming a gate insulating film on the second semiconductor layer; (7) forming a gate electrode on the gate insulating film over the channel region; and, (8) forming impurity regions of a second conductivity type in the first, and second semiconductor layers on both sides of the gate electrode.
Claim 3
Dependent Claim
23 words
A method as claimed in claim 1, wherein, in the step (2), the semiconductor substrate is etched to a depth of 1500˜5000 Å.
Claim 4
Dependent Claim
20 words
A method as claimed in claim 1, wherein the insulating film 24 includes an oxide film and a nitride film.
Claim 5
Dependent Claim
19 words
A method as claimed in claim 1, wherein the insulating film is formed to a thickness of 500˜3500 Å.
Claim 6
Dependent Claim
20 words
A method as claimed in claim 1, wherein the first, and second semiconductor layers are formed of an identical material.
Claim 7
Dependent Claim
18 words
A method as claimed in claim 1, wherein the first, and second semiconductor layers are formed of polysilicon.
Claim 8
Dependent Claim
22 words
A method as claimed in claim 1, wherein the first semiconductor layer and the insulating film are subjected to chemical mechanical polishing.
Claim 9
Dependent Claim
37 words
A method as claimed in claim 1, wherein a depth of etching in the step (2) is equal to a junction depth of the source/drain regions plus a thickness of the insulating film formed in step 3.
Claim 10
Dependent Claim
25 words
A method as claimed in claim 1, wherein the semiconductor substrate and the first semiconductor layer are epitaxially grown to form the second semiconductor layer.
Claim 11
Dependent Claim
24 words
A method as claimed in claim 1, wherein, after the second semiconductor layer is formed, the second semiconductor layer is injected of channel ions.
Claim 12
Dependent Claim
23 words
A method as claimed in claim 1, further including the step of forming LDD regions between the channel region and the source/drain regions.
Claim 13
Dependent Claim
77 words
A method as claimed in claim 1, wherein the step (8) includes the steps of: lightly doping the first and second semiconductor layers on both sides of the gate electrode with impurity ions of a second conductivity type, to form LDD regions, forming sidewall spacers at sides of the gate electrode, and using the sidewall spacers and the gate electrode in heavily doping the first and second semiconductor layers with impurity ions of the second conductivity type.