Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
196 words
A method of planarizing wafers with shallow trench isolation, comprising the steps of: providing a semiconductor wafer; forming a layer of pad oxide on said semiconductor wafer; forming a layer of silicon nitride on said layer of pad oxide thereby forming a silicon nitride plane wherein said layer of pad oxide and said semiconductor wafer are below said silicon nitride plane; forming isolation trenches in said semiconductor wafer wherein each said isolation trench has a depth, a width, sidewalls, and a bottom thereby removing that part of said layer of pad oxide directly over said isolation trenches and that part of said layer of silicon nitride directly over said isolation trenches; forming a layer of isolation oxide over said semiconductor wafer after forming said layer of silicon nitride and said isolation trenches thereby filling said isolation trenches with isolation oxide; forming a layer of spin on glass over said layer of isolation oxide; and planarizing said semiconductor wafer after forming said layer of spin on glass by means of chemical mechanical polishing using an abrasive slurry thereby removing said layer of spin on glass and that part of said isolation oxide above said silicon nitride plane.
Claim 2
Independent Claim
196 words
A method of planarizing wafers with shallow trench isolation, comprising the steps of: providing a semiconductor wafer; forming a layer of pad oxide on said semiconductor wafer; forming a layer of silicon nitride on said layer of pad oxide thereby forming a silicon nitride plane wherein said layer of pad oxide and said semiconductor wafer are below said silicon nitride plane; forming isolation trenches in said semiconductor wafer wherein each said isolation trench has a depth, a width, sidewalls, and a bottom thereby removing that part of said layer of pad oxide directly over said isolation trenches and that part of said layer of silicon nitride directly over said isolation trenches; forming a layer of isolation oxide over said semiconductor wafer after forming said layer of silicon nitride and said isolation trenches thereby filling said isolation trenches with isolation oxide; forming a layer of spin on glass over said layer of isolation oxide; and planarizing said semiconductor wafer after forming said layer of spin on glass by means of chemical mechanical polishing using an abrasive slurry thereby removing said layer of spin on glass and that part of said isolation oxide above said silicon nitride plane.
Claim 3
Dependent Claim
18 words
The method of claim 1 wherein said isolation oxide is SiO 2 formed by decomposition of tetraethyl orthosilicate.
Claim 4
Dependent Claim
19 words
The method of claim 1 wherein said isolation oxide is SiO 2 formed by decomposition of ozone tetraethyl orthosilicate.
Claim 5
Dependent Claim
19 words
The method of claim 1 wherein said isolation oxide is SiO 2 formed using a high density plasma discharge.
Claim 6
Dependent Claim
35 words
The method of claim 1 wherein said abrasive slurry is an oxide slurry and the polishing rate for said isolation oxide is about two times greater than the polishing rate for said spin on glass.
Claim 7
Dependent Claim
45 words
The method of claim 1 wherein forming said layer of spin on glass comprises forming a first sublayer of spin on glass over said layer of isolation oxide and forming a second sublayer of spin on glass over said first sublayer of spin on glass.
Claim 8
Dependent Claim
20 words
The method of claim 1 wherein said depth of said isolation trenches is between about 0.4 microns and 0.6 microns.
Claim 9
Dependent Claim
12 words
The method of claim 1 wherein said pad oxide is silicon dioxide.
Claim 10
Independent Claim
222 words
A method of planarizing wafers with shallow trench isolation, comprising the steps of: providing a semiconductor wafer; forming a layer of pad oxide on said semiconductor wafer; forming a layer of silicon nitride on said layer of pad oxide thereby forming a silicon nitride plane wherein said layer of pad oxide and said semiconductor wafer are below said silicon nitride plane; forming isolation trenches in said semiconductor wafer wherein each said isolation trench has a width, a depth, sidewalls, and a bottom thereby removing that part of said layer of pad oxide directly over said isolation trenches and that part of said layer of silicon nitride directly over said isolation trenches; forming a layer of insulator oxide on said sidewalls and said bottoms of said isolation trenches; forming a layer of polysilicon over said semiconductor wafer after forming said layer of silicon nitride and said layer of insulator oxide on said sidewalls and said bottoms of said isolation trenches thereby filling said isolation trenches with polysilicon; forming a layer of spin on glass over said layer of polysilicon; and planarizing said semiconductor wafer after forming said layer of spin on glass by means of chemical mechanical polishing using an abrasive slurry thereby removing said layer of spin on glass and that part of said layer of polysilicon above said silicon nitride plane.
Claim 11
Independent Claim
222 words
A method of planarizing wafers with shallow trench isolation, comprising the steps of: providing a semiconductor wafer; forming a layer of pad oxide on said semiconductor wafer; forming a layer of silicon nitride on said layer of pad oxide thereby forming a silicon nitride plane wherein said layer of pad oxide and said semiconductor wafer are below said silicon nitride plane; forming isolation trenches in said semiconductor wafer wherein each said isolation trench has a width, a depth, sidewalls, and a bottom thereby removing that part of said layer of pad oxide directly over said isolation trenches and that part of said layer of silicon nitride directly over said isolation trenches; forming a layer of insulator oxide on said sidewalls and said bottoms of said isolation trenches; forming a layer of polysilicon over said semiconductor wafer after forming said layer of silicon nitride and said layer of insulator oxide on said sidewalls and said bottoms of said isolation trenches thereby filling said isolation trenches with polysilicon; forming a layer of spin on glass over said layer of polysilicon; and planarizing said semiconductor wafer after forming said layer of spin on glass by means of chemical mechanical polishing using an abrasive slurry thereby removing said layer of spin on glass and that part of said layer of polysilicon above said silicon nitride plane.
Claim 12
Dependent Claim
37 words
The method of claim 9 wherein said abrasive slurry is an oxide slurry and the polishing rate for said polysilicon is between about 4 and 6 times greater than the polishing rate for said spin on glass.
Claim 13
Dependent Claim
36 words
The method of claim 9 wherein said chemical mechanical polishing uses a polishing pad and the endpoint of said chemical mechanical polishing is determined by the rate of change of the temperature of said polishing pad.
Claim 14
Dependent Claim
45 words
The method of claim 9 wherein forming said layer of spin on glass comprises forming a first sublayer of spin on glass over said layer of isolation oxide and forming a second sublayer of spin on glass over said first sublayer of spin on glass.
Claim 15
Dependent Claim
20 words
The method of claim 9 wherein said depth of said isolation trenches is between about 0.4 microns and 0.6 microns.
Claim 16
Dependent Claim
12 words
The method of claim 9 wherein said pad oxide is silicon dioxide.
Claim 17
Dependent Claim
22 words
The method of claim 9 wherein said insulator oxide is SiO 2 having a thickness of between about 200 and 800 Angstroms.