Patent US7616823B2 successfully refreshed from Google Patents.
Patent US6501165B1 successfully refreshed from Google Patents.
US6501165B1
Expired / Lapsed
US
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Stackable semiconductor package having conductive layer and insulating layers and method of fabrication
Assignee: Micron Technology Inc
•
Filing: 2002-06-03
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Granted: 2002-12-31
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Expires: 2022-06-03
Abstract
Abstract A semiconductor package includes a substrate and a semiconductor die wire bonded, or alternately flip chip bonded, to the substrate. The substrate includes three separate layers including a conductive layer having a pattern of conductive traces, a first insulating layer covering the conductive traces, and a second insulating layer covering the die. The insulating layers also include planar surfaces having external contacts, and conductive vias in electrical communication with the external contacts and with the conductive traces. The external contacts have matching patterns, such that the package can be stacked on a substantially identical package to form a stacked electronic assembly. In addition, the packages in the stacked assembly can have different circuit configurations, and can perform different functions in the assembly. A method for fabricating the package includes the steps of providing the conductive layer having the conductive traces, attaching the die to the conductive traces, forming the first insulating layer on the conductive layer, forming the second insulating layer on the die, forming the conductive vias through the insulating layers, and then forming the external contacts on the planar surfaces of the insulating layers.
Inventors
- 👤 Warren M. Farnworth
- 👤 Alan G. Wood
- 👤 Mike Brooks
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 12:30
CPC Classifications
H; H10; H10W; H10W90/00; H10W70/00; H10W70/60; H10W72/00; H10W72/01; H10W72/0198; H10W72/20; H10W72/29; H10W72/50; H10W72/59; H10W72/851; H10W72/853; H10W72/865; H10W72/90; H10W72/931; H10W72/932; H10W72/941; H10W72/944; H10W72/9445; H10W74/00; H10W90/701; H10W90/721; H10W90/722; H10W90/731; H10W90/736; H10W90/751; H10W90/756
Claims Analysis
Total Claims: 39
Claim 1
Independent Claim
134 words
A semiconductor package comprising: a substrate comprising three separate layers include a conductive layer comprising a plurality of conductive traces, a first insulating layer on a first side of the conductive layer, and a second insulating layer on a second side of the conductive layer; a semiconductor die attached to the second side of the conductive layer in electrical communication with the conductive traces and at least partially covered by the second insulating layer; a plurality of first external contacts on the first insulating layer and a plurality of second external contacts on the second insulating layer in a matching pattern; and a plurality of conductive vias in the first insulating layer and in the second insulating layer in electrical communication with the first external contacts, the second external contacts and the conductive traces.
Claim 2
Dependent Claim
134 words
A semiconductor package comprising: a substrate comprising three separate layers include a conductive layer comprising a plurality of conductive traces, a first insulating layer on a first side of the conductive layer, and a second insulating layer on a second side of the conductive layer; a semiconductor die attached to the second side of the conductive layer in electrical communication with the conductive traces and at least partially covered by the second insulating layer; a plurality of first external contacts on the first insulating layer and a plurality of second external contacts on the second insulating layer in a matching pattern; and a plurality of conductive vias in the first insulating layer and in the second insulating layer in electrical communication with the first external contacts, the second external contacts and the conductive traces.
Claim 3
Dependent Claim
42 words
The semiconductor package of claim 1 further comprising a plurality of wires bonded to the die and to the conductive traces, and wherein the wires are covered by the first insulating layer and the die is covered by the second insulating layer.
Claim 4
Dependent Claim
41 words
The semiconductor package of claim 1 wherein the die is flip chip bonded to the second side of the conductive traces, the conductive traces are covered by the first insulating layer and the die is covered by the second insulating layer.
Claim 5
Dependent Claim
36 words
The semiconductor package of claim 1 further comprising a second semiconductor package stacked on the semiconductor package comprising a plurality of third external contacts bonded to the first external contacts or to the second external contacts.
Claim 6
Dependent Claim
52 words
The semiconductor package of claim 1 further comprising a second semiconductor package stacked on the semiconductor package comprising a plurality of third external contacts bonded to the first external contacts or to the second external contacts, and a plurality of second conductive traces having a different circuit configuration than the conductive traces.
Claim 7
Dependent Claim
152 words
A semiconductor package comprising: a conductive layer comprising a plurality of conductive traces having a first side and an opposing second side; a semiconductor die attached to the conductive layer in electrical communication with the conductive traces; a first insulating on the first side covering the conductive traces and having a first planar surface; a second insulating layer on the second side covering the die and having a second planar surface; a plurality of first external contacts on the first planar surface in a first pattern; a plurality of first conductive vias in the first insulating layer in electrical communication with the first external contacts and the conductive traces; a plurality of second external contacts on the second planar surface in a second pattern matching the first pattern; and a plurality of second conductive vias in the second insulating layer in electrical communication with the second external contacts and the conductive traces.
Claim 8
Dependent Claim
152 words
A semiconductor package comprising: a conductive layer comprising a plurality of conductive traces having a first side and an opposing second side; a semiconductor die attached to the conductive layer in electrical communication with the conductive traces; a first insulating on the first side covering the conductive traces and having a first planar surface; a second insulating layer on the second side covering the die and having a second planar surface; a plurality of first external contacts on the first planar surface in a first pattern; a plurality of first conductive vias in the first insulating layer in electrical communication with the first external contacts and the conductive traces; a plurality of second external contacts on the second planar surface in a second pattern matching the first pattern; and a plurality of second conductive vias in the second insulating layer in electrical communication with the second external contacts and the conductive traces.
Claim 9
Dependent Claim
28 words
The semiconductor package of claim 6 further comprising a plurality of wires bonded to the die and to the conductive traces, and covered by the first insulating layer.
Claim 10
Dependent Claim
27 words
The semiconductor package of claim 6 wherein the conductive layer comprises a segment of a lead frame, and the die is wire bonded to the conductive traces.
Claim 11
Dependent Claim
17 words
The semiconductor package of claim 6 wherein the die is flip chip bonded to the conductive traces.
Claim 12
Dependent Claim
27 words
The semiconductor package of claim 6 wherein the first insulating layer comprises a glass filled resin and the die is flip chip bonded to the conductive traces.
Claim 13
Dependent Claim
164 words
A semiconductor package comprising: a conductive layer comprising a plurality of conductive traces, the conductive layer comprising a segment of a lead frame having a first surface and an opposing second surface; a semiconductor die attached to the conductive traces; a plurality of wires bonded to the die and to the conductive traces; a first insulating layer on the conductive traces covering the wires and the first surface; a second insulating layer on the conductive traces covering the die and the second surface; a plurality of first external contacts on the first insulating layer having a first pattern; a plurality of first conductive vias in the first insulating layer in electrical communication with the first external contacts and the conductive traces; a plurality of second external contacts on the second insulating layer having a second pattern matching the first pattern; and a plurality of second conductive vias in the second insulating layer in electrical communication with the second external contacts and the conductive traces.
Claim 14
Dependent Claim
164 words
A semiconductor package comprising: a conductive layer comprising a plurality of conductive traces, the conductive layer comprising a segment of a lead frame having a first surface and an opposing second surface; a semiconductor die attached to the conductive traces; a plurality of wires bonded to the die and to the conductive traces; a first insulating layer on the conductive traces covering the wires and the first surface; a second insulating layer on the conductive traces covering the die and the second surface; a plurality of first external contacts on the first insulating layer having a first pattern; a plurality of first conductive vias in the first insulating layer in electrical communication with the first external contacts and the conductive traces; a plurality of second external contacts on the second insulating layer having a second pattern matching the first pattern; and a plurality of second conductive vias in the second insulating layer in electrical communication with the second external contacts and the conductive traces.
Claim 15
Dependent Claim
20 words
The semiconductor package of claim 11 wherein the first insulating layer or the second insulating layer comprises a polymer resist.
Claim 16
Dependent Claim
20 words
The semiconductor package of claim 11 wherein the first insulating layer or the second insulating layer comprises a tape material.
Claim 17
Dependent Claim
20 words
The semiconductor package of claim 11 wherein the first insulating layer or the second insulating layer comprise a curable polymer.
Claim 18
Dependent Claim
35 words
The semiconductor package of claim 11 further comprising a second semiconductor package stacked and bonded to the semiconductor package and comprising a plurality of second conductive traces having a different configuration than the conductive traces.
Claim 19
Dependent Claim
124 words
A semiconductor package comprising: a first insulating layer; a conductive layer on the first insulating layer comprising a plurality of conductive traces; a semiconductor die flip chip bonded to the conductive traces; a second insulating layer on the conductive traces covering the die; a plurality of first external contacts on the first insulating layer having a first pattern; a plurality of first conductive vias in the first insulating layer in electrical communication with the first external contacts and the conductive traces; a plurality of second external contacts on the second insulating layer having a second pattern matching the first pattern; and a plurality of second conductive vias in the second insulating layer in electrical communication with the second external contacts and the conductive traces.
Claim 20
Dependent Claim
124 words
A semiconductor package comprising: a first insulating layer; a conductive layer on the first insulating layer comprising a plurality of conductive traces; a semiconductor die flip chip bonded to the conductive traces; a second insulating layer on the conductive traces covering the die; a plurality of first external contacts on the first insulating layer having a first pattern; a plurality of first conductive vias in the first insulating layer in electrical communication with the first external contacts and the conductive traces; a plurality of second external contacts on the second insulating layer having a second pattern matching the first pattern; and a plurality of second conductive vias in the second insulating layer in electrical communication with the second external contacts and the conductive traces.
Claim 21
Dependent Claim
29 words
The semiconductor package of claim 16 wherein the first insulating layer comprises a glass resin, and the conductive traces comprise a metal layer laminated to the first insulating layer.
Claim 22
Dependent Claim
19 words
The semiconductor package of claim 16 wherein the first external contacts and the second external contacts comprise planar pads.
Claim 23
Dependent Claim
21 words
The semiconductor package of claim 16 wherein the first external contacts comprise planar pads and the second external contacts comprise balls.
Claim 24
Dependent Claim
35 words
The semiconductor package of claim 16 further comprising a second semiconductor package stacked and bonded to the semiconductor package and comprising a plurality of second conductive traces having a different configuration than the conductive traces.
Claim 25
Dependent Claim
152 words
An electronic assembly comprising: a first semiconductor package comprising: a conductive layer comprising a plurality of conductive traces, a first insulating layer on a first side of the conductive layer, and a second insulating layer on a second side of the conductive layer; a semiconductor die attached to the second side of the conductive layer in electrical communication with the conductive traces and at least partially covered by the second insulating layer; a plurality of first external contacts on the first insulating layer and a plurality of second external contacts on the second insulating layer in a matching pattern; and a plurality of conductive vias in the first insulating layer and in the second insulating layer in electrical communication with the first external contacts, the second external contacts and the conductive traces; and a second semiconductor package substantially identical to the first semiconductor package stacked and bonded to the first semiconductor package.
Claim 26
Dependent Claim
152 words
An electronic assembly comprising: a first semiconductor package comprising: a conductive layer comprising a plurality of conductive traces, a first insulating layer on a first side of the conductive layer, and a second insulating layer on a second side of the conductive layer; a semiconductor die attached to the second side of the conductive layer in electrical communication with the conductive traces and at least partially covered by the second insulating layer; a plurality of first external contacts on the first insulating layer and a plurality of second external contacts on the second insulating layer in a matching pattern; and a plurality of conductive vias in the first insulating layer and in the second insulating layer in electrical communication with the first external contacts, the second external contacts and the conductive traces; and a second semiconductor package substantially identical to the first semiconductor package stacked and bonded to the first semiconductor package.
Claim 27
Dependent Claim
21 words
The electronic assembly of claim 21 wherein the second semiconductor package has a different circuit configuration than the first semiconductor package.
Claim 28
Dependent Claim
27 words
The electronic assembly of claim 21 wherein the second semiconductor package comprises a plurality of third conductive traces having a different circuit configuration than the conductive traces.
Claim 29
Dependent Claim
38 words
The electronic assembly of claim 21 further comprising a plurality of wires bonded to the die and to the conductive traces, the wires covered by the first insulating layer and the die covered by the second insulating layer.
Claim 30
Dependent Claim
41 words
The electronic assembly of claim 21 wherein the die is flip chip bonded to the second side of the conductive traces, the conductive traces are covered by the first insulating layer and the die is covered by the second insulating layer.
Claim 31
Dependent Claim
203 words
An electronic assembly comprising: a first semiconductor package comprising: a conductive layer comprising a plurality of conductive traces, the conductive layer comprising a segment of a lead frame having a first surface and an opposing second surface; a semiconductor die attached to the conductive traces; a plurality of wires bonded to the die and to the conductive traces; a first insulating layer on the conductive traces covering the wires and the first surface; a second insulating layer on the conductive traces covering the die and the second surface; a plurality of first external contacts on the first insulating layer having a first pattern; a plurality of first conductive vias in the first insulating layer in electrical communication with the first external contacts and the conductive traces; a plurality of second external contacts on the second insulating layer having a second pattern matching the first pattern; and a plurality of second conductive vias in the second insulating layer in electrical communication with the second external contacts and the conductive traces; and a second semiconductor package substantially similar to the semiconductor package stacked and bonded to the first semiconductor package, the second semiconductor package configured to perform a different circuit function than the semiconductor package.
Claim 32
Dependent Claim
203 words
An electronic assembly comprising: a first semiconductor package comprising: a conductive layer comprising a plurality of conductive traces, the conductive layer comprising a segment of a lead frame having a first surface and an opposing second surface; a semiconductor die attached to the conductive traces; a plurality of wires bonded to the die and to the conductive traces; a first insulating layer on the conductive traces covering the wires and the first surface; a second insulating layer on the conductive traces covering the die and the second surface; a plurality of first external contacts on the first insulating layer having a first pattern; a plurality of first conductive vias in the first insulating layer in electrical communication with the first external contacts and the conductive traces; a plurality of second external contacts on the second insulating layer having a second pattern matching the first pattern; and a plurality of second conductive vias in the second insulating layer in electrical communication with the second external contacts and the conductive traces; and a second semiconductor package substantially similar to the semiconductor package stacked and bonded to the first semiconductor package, the second semiconductor package configured to perform a different circuit function than the semiconductor package.
Claim 33
Dependent Claim
27 words
The electronic assembly of claim 26 wherein the first insulating layer or the second insulating layer comprises a polymer resist, a tape material or a curable polymer.
Claim 34
Dependent Claim
27 words
The electronic assembly of claim 26 wherein the second semiconductor package comprises a plurality of second conductive traces having a different circuit configuration than the conductive traces.
Claim 35
Dependent Claim
28 words
The electronic assembly of claim 26 wherein the second semiconductor package comprises a plurality of second conductive traces having a different wire bonding configuration than the conductive traces.
Claim 36
Dependent Claim
27 words
The electronic assembly of claim 26 wherein the second semiconductor package comprises a plurality of second conductive traces having a different circuit configuration than the conductive traces.
Claim 37
Dependent Claim
29 words
The electronic assembly of claim 26 wherein the first insulating layer comprises a glass resin, and the conductive traces comprise a metal layer laminated to the first insulating layer.
Claim 38
Dependent Claim
163 words
An electronic assembly comprising: a first semiconductor package comprising: a first insulating layer; a conductive layer on the first insulating layer comprising a plurality of conductive traces; a semiconductor die flip chip bonded to the conductive traces; a second insulating layer on the conductive traces covering the die; a plurality of first external contacts on the first insulating layer having a first pattern; a plurality of first conductive vias in the first insulating layer in electrical communication with the first external contacts and the conductive traces; a plurality of second external contacts on the second insulating layer having a second pattern matching the first pattern; and a plurality of second conductive vias in the second insulating layer in electrical communication with the second external contacts and the conductive traces; and a second semiconductor package substantially similar to the semiconductor package stacked and bonded to the first semiconductor package, the second semiconductor package configured to perform a different circuit function than the semiconductor package.
Claim 39
Dependent Claim
163 words
An electronic assembly comprising: a first semiconductor package comprising: a first insulating layer; a conductive layer on the first insulating layer comprising a plurality of conductive traces; a semiconductor die flip chip bonded to the conductive traces; a second insulating layer on the conductive traces covering the die; a plurality of first external contacts on the first insulating layer having a first pattern; a plurality of first conductive vias in the first insulating layer in electrical communication with the first external contacts and the conductive traces; a plurality of second external contacts on the second insulating layer having a second pattern matching the first pattern; and a plurality of second conductive vias in the second insulating layer in electrical communication with the second external contacts and the conductive traces; and a second semiconductor package substantially similar to the semiconductor package stacked and bonded to the first semiconductor package, the second semiconductor package configured to perform a different circuit function than the semiconductor package.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2005-12-30 | 2006-07-01 | 2006-12-31 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2009-12-30 | 2010-07-01 | 2010-12-31 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2013-12-30 | 2014-07-01 | 2014-12-31 | $7700.00 | Window Closed / Lapsed |