US6496370B2
Expired / Lapsed
US
⏱️ 0.0 years remaining
Structure and method for an electronic assembly
Assignee: Micron Technology Inc
•
Filing: 2001-04-17
•
Granted: 2002-12-17
•
Expires: 2021-04-17
Abstract
Abstract An electronic assembly is provided. The electronic assembly includes a semiconductor interposer having first and second surfaces. The semiconductor interposer also has cooling channels passing through the interposer between the first and second surfaces. The electronic assembly has at least one semiconductor chip disposed outwardly from the first surface of the semiconductor interposer and at least one semiconductor chip disposed outwardly from the second surface of the semiconductor interposer. The electronic assembly also has a number of electrical connections through the semiconductor interposer wherein the number of electrical connections couple the semiconductor chips disposed outwardly from the first and second surfaces of the semiconductor interposer.
Inventors
- 👤 Joseph E. Geusic
- 👤 Leonard Forbes
- 👤 Kie Y. Ahn
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 13:17
CPC Classifications
H; H10; H10W; H10W40/00; H10W40/40; H10W40/47; H05; H05K; H05K1/00; H05K1/02; H05K1/0272
Claims Analysis
Total Claims: 64
Claim 1
Independent Claim
88 words
An electronic assembly, comprising: a semiconductor wafer having first and second surfaces and having cooling channels passing through the wafer between the first and second surfaces; at least one integrated circuit disposed outwardly from the first surface of the semiconductor wafer; at least one integrated circuit disposed outwardly from the second surface of the semiconductor wafer; and a number of electrical connections through the semiconductor wafer wherein the number of electrical connections couple the integrated circuits disposed outwardly from the first and second surfaces of the semiconductor wafer.
Claim 2
Dependent Claim
88 words
An electronic assembly, comprising: a semiconductor wafer having first and second surfaces and having cooling channels passing through the wafer between the first and second surfaces; at least one integrated circuit disposed outwardly from the first surface of the semiconductor wafer; at least one integrated circuit disposed outwardly from the second surface of the semiconductor wafer; and a number of electrical connections through the semiconductor wafer wherein the number of electrical connections couple the integrated circuits disposed outwardly from the first and second surfaces of the semiconductor wafer.
Claim 3
Dependent Claim
29 words
The electronic assembly of claim 1 , wherein the at least one integrated circuit disposed outwardly from the first surface of the semiconductor wafer includes a memory integrated circuit.
Claim 4
Dependent Claim
17 words
The electronic assembly of claim 2 , wherein the memory integrated circuit is a DRAM integrated circuit.
Claim 5
Dependent Claim
29 words
The electronic assembly of claim 1 , wherein the at least one integrated circuit disposed outwardly from the first surface of the semiconductor wafer includes a microprocessor integrated circuit.
Claim 6
Dependent Claim
16 words
The electronic assembly of claim 1 , wherein the cooling channels are filled with a liquid.
Claim 7
Dependent Claim
16 words
The electronic assembly of claim 1 , wherein the cooling channels are filled with a refrigerant.
Claim 8
Dependent Claim
22 words
The electronic assembly of claim 1 , wherein the semiconductor wafer further comprises first and second semiconductor wafers that are bonded together.
Claim 9
Dependent Claim
39 words
The electronic assembly of claim 7 , wherein the first and the second semiconductor wafers each include trenches formed in a working surface thereof such that the trenches align to form the cooling channels of the bonded semiconductor wafer.
Claim 10
Dependent Claim
19 words
The electronic assembly of claim 1 , and further including a heat dissipation device coupled to the cooling channels.
Claim 11
Dependent Claim
19 words
The electronic assembly of claim 9 , wherein the heat dissipation device comprises a heat exchanger and a pump.
Claim 12
Dependent Claim
19 words
The electronic assembly of claim 9 , wherein the heat dissipation device comprises a heat exchanger and a compressor.
Claim 13
Dependent Claim
98 words
An electronic system module, comprising: a semiconductor wafer having first and second opposing surfaces and having cooling channels passing through the wafer between the first and second opposing surfaces; a wiring layer formed on at least one of the opposing surfaces of the semiconductor wafer; a number of semiconductor chips disposed outwardly from at least one of the opposing surfaces of the semiconductor wafer and interconnected to the at least one of the opposing surfaces using the wiring layer; and each semiconductor chip having a working surface containing an integrated circuit that is coupled to the wiring layer.
Claim 14
Dependent Claim
98 words
An electronic system module, comprising: a semiconductor wafer having first and second opposing surfaces and having cooling channels passing through the wafer between the first and second opposing surfaces; a wiring layer formed on at least one of the opposing surfaces of the semiconductor wafer; a number of semiconductor chips disposed outwardly from at least one of the opposing surfaces of the semiconductor wafer and interconnected to the at least one of the opposing surfaces using the wiring layer; and each semiconductor chip having a working surface containing an integrated circuit that is coupled to the wiring layer.
Claim 15
Dependent Claim
57 words
The electronic system module of claim 12 , and further comprising a number of semiconductor chips disposed outwardly from both the first and the second opposing surfaces, a number of electrical connections extending through the semiconductor wafer, the number of electrical connections coupling the number of semiconductor chips on each opposing surface of the semiconductor wafer together.
Claim 16
Dependent Claim
21 words
The electronic system module of claim 12 , wherein the number of semiconductor chips include a microprocessor and a memory device.
Claim 17
Dependent Claim
17 words
The electronic system module of claim 12 , wherein the cooling channels are filled with a liquid.
Claim 18
Dependent Claim
17 words
The electronic system module of claim 12 , wherein the cooling channels are filled with a refrigerant.
Claim 19
Dependent Claim
29 words
The electronic system module of claim 12 , wherein the semiconductor wafer further comprises first and second semiconductor wafers that are bonded together to form an all silicon structure.
Claim 20
Dependent Claim
40 words
The electronic system module of claim 17 , wherein the first and the second semiconductor wafers each include trenches formed in a working surface thereof such that the trenches align to form the cooling channels of the bonded silicon structure.
Claim 21
Dependent Claim
20 words
The electronic system module of claim 12 , and further including a heat dissipation device coupled to the cooling channels.
Claim 22
Dependent Claim
20 words
The electronic system module of claim 19 , wherein the heat dissipation device comprises a heat exchanger and a pump.
Claim 23
Dependent Claim
20 words
The electronic system module of claim 19 , wherein the heat dissipation device comprises a heat exchanger and a compressor.
Claim 24
Dependent Claim
78 words
A computer system, comprising: an electronic assembly, the electronic assembly including: a semiconductor wafer having first and second surfaces and having cooling channels passing through the wafer between the first and second surfaces, and a number of semiconductor chips disposed outwardly from both the first and second surfaces and electrically interconnected through the semiconductor wafer, a number of external devices; and a system bus, wherein the system bus couples the electronic assembly to the number of external devices.
Claim 25
Dependent Claim
78 words
A computer system, comprising: an electronic assembly, the electronic assembly including: a semiconductor wafer having first and second surfaces and having cooling channels passing through the wafer between the first and second surfaces, and a number of semiconductor chips disposed outwardly from both the first and second surfaces and electrically interconnected through the semiconductor wafer, a number of external devices; and a system bus, wherein the system bus couples the electronic assembly to the number of external devices.
Claim 26
Dependent Claim
17 words
The computer system of claim 22 , wherein the number of semiconductor chips includes a memory chip.
Claim 27
Dependent Claim
15 words
The computer system of claim 23 , wherein the memory chip is a DRAM chip.
Claim 28
Dependent Claim
17 words
The computer system of claim 22 , wherein the number of semiconductor chips includes a microprocessor chip.
Claim 29
Dependent Claim
16 words
The computer system of claim 22 , wherein the cooling channels are filled with a liquid.
Claim 30
Dependent Claim
16 words
The computer system of claim 22 , wherein the cooling channels are filled with a refrigerant.
Claim 31
Dependent Claim
28 words
The computer system of claim 22 , wherein the semiconductor wafer further comprises first and second semiconductor wafers that are bonded together to form an all silicon structure.
Claim 32
Dependent Claim
40 words
The computer system of claim 28 , wherein the first and the second semiconductor wafers each include trenches formed in a working surface thereof such that the trenches align to form the cooling channels of the bonded all silicon structure.
Claim 33
Dependent Claim
19 words
The computer system of claim 22 , and further including a heat dissipation device coupled to the cooling channels.
Claim 34
Dependent Claim
19 words
The computer system of claim 30 , wherein the heat dissipation device comprises a heat exchanger and a pump.
Claim 35
Dependent Claim
19 words
The computer system of claim 30 , wherein the heat dissipation device comprises a heat exchanger and a compressor.
Claim 36
Independent Claim
109 words
A method for forming an electronic system, the method comprising: forming trenches in working surfaces of first and second semiconductor wafers; bonding the wafers together such that the trenches align to form cooling channels for an all silicon structure formed of the first and the second semiconductor wafers; filling the cooling channels with a liquid; forming a wiring layer on at least one surface of the all silicon structure formed of the first and the second semiconductor wafers; and coupling integrated circuits from a number of additional semiconductor wafers, attached to the all silicon structure formed of the first and the second semiconductor wafers, together with the wiring layer.
Claim 37
Independent Claim
109 words
A method for forming an electronic system, the method comprising: forming trenches in working surfaces of first and second semiconductor wafers; bonding the wafers together such that the trenches align to form cooling channels for an all silicon structure formed of the first and the second semiconductor wafers; filling the cooling channels with a liquid; forming a wiring layer on at least one surface of the all silicon structure formed of the first and the second semiconductor wafers; and coupling integrated circuits from a number of additional semiconductor wafers, attached to the all silicon structure formed of the first and the second semiconductor wafers, together with the wiring layer.
Claim 38
Dependent Claim
23 words
The method of claim 33 , and wherein filling the cooling channels with a liquid comprises filling the cooling channels with a refrigerant.
Claim 39
Dependent Claim
43 words
The method of claim 33 , wherein coupling the integrated circuits from a number of additional semiconductor wafers, attached to the all silicon structure formed of the first and the second semiconductor wafers, together includes coupling a microprocessor chip to the wiring layer.
Claim 40
Dependent Claim
43 words
The method of claim 33 , wherein coupling the integrated circuits from a number of additional semiconductor wafers, attached to the all silicon structure formed of the first and the second semiconductor wafers, together includes coupling a memory chip to the wiring layer.
Claim 41
Dependent Claim
101 words
The method of claim 33 , and wherein forming the wiring layer includes: forming a first layer on a first surface of the all silicon structure formed of the first and the second semiconductor wafers; forming a second layer on a second surface of the all silicon structure formed of the first and the second semiconductor wafers; and forming vias through the all silicon structure formed of the first and the second semiconductor wafers in order to selectively connect the first and second layers on opposing sides of the all silicon structure formed of the first and the second semiconductor wafers.
Claim 42
Dependent Claim
23 words
The method of claim 33 , wherein the channels are filled with liquid after the integrated circuits are coupled to the wiring layer.
Claim 43
Dependent Claim
20 words
The method of claim 33 , and further comprising coupling a heat exchanger and a compressor to the cooling channels.
Claim 44
Dependent Claim
20 words
The method of claim 33 , and further comprising coupling a hear exchanger and a pump to the cooling channels.
Claim 45
Dependent Claim
112 words
An electronic system module, comprising: a semiconductor wafer having first and second opposing surfaces and having cooling channels passing through the wafer between the first and second opposing surfaces; wherein the cooling channels are filled with a liquid; a wiring layer having portions formed on the first and second opposing surfaces of the semiconductor wafer; the wiring layer including a number of electrical connections extending through the semiconductor wafer; a number of semiconductor chips disposed outwardly from at least one of the surfaces of the semiconductor wafer and interconnected using the wiring layer; and each semiconductor chip having a working surface containing an integrated circuit that is coupled to the wiring layer.
Claim 46
Dependent Claim
112 words
An electronic system module, comprising: a semiconductor wafer having first and second opposing surfaces and having cooling channels passing through the wafer between the first and second opposing surfaces; wherein the cooling channels are filled with a liquid; a wiring layer having portions formed on the first and second opposing surfaces of the semiconductor wafer; the wiring layer including a number of electrical connections extending through the semiconductor wafer; a number of semiconductor chips disposed outwardly from at least one of the surfaces of the semiconductor wafer and interconnected using the wiring layer; and each semiconductor chip having a working surface containing an integrated circuit that is coupled to the wiring layer.
Claim 47
Dependent Claim
14 words
The electronic system module of claim 41 , wherein the liquid is a refrigerant.
Claim 48
Dependent Claim
29 words
The electronic system module of claim 41 , wherein the semiconductor wafer further comprises first and second semiconductor wafers that are bonded together to form an all silicon structure.
Claim 49
Dependent Claim
40 words
The electronic system module of claim 41 , wherein the first and the second semiconductor wafers each include trenches formed in a working surface thereof such that the trenches align to form the cooling channels of the bonded semiconductor wafer.
Claim 50
Dependent Claim
21 words
The electronic system module of claim 41 , wherein the number of semiconductor chips include a microprocessor and a memory device.
Claim 51
Dependent Claim
20 words
The electronic system module of claim 41 , and further including a heat dissipation device coupled to the cooling channels.
Claim 52
Dependent Claim
20 words
The electronic system module of claim 46 , wherein the heat dissipation device comprises a heat exchanger and a pump.
Claim 53
Dependent Claim
20 words
The electronic system module of claim 46 , wherein the heat dissipation device comprises a heat exchanger and a compressor.
Claim 54
Dependent Claim
73 words
A bounded silicon structure, comprising: a first semiconductor wafer having a working surface; a second semiconductor wafer having a working surface; a number of trenches formed on opposite sides of the working surfaces of the first and second semiconductor wafers; and wherein the first and second semiconductor wafers are bonded together to form the bounded silicon structure and such that the trenches are aligned to form cooling channels through the bounded silicon structure.
Claim 55
Dependent Claim
73 words
A bounded silicon structure, comprising: a first semiconductor wafer having a working surface; a second semiconductor wafer having a working surface; a number of trenches formed on opposite sides of the working surfaces of the first and second semiconductor wafers; and wherein the first and second semiconductor wafers are bonded together to form the bounded silicon structure and such that the trenches are aligned to form cooling channels through the bounded silicon structure.
Claim 56
Dependent Claim
108 words
A bounded silicon structure, comprising: a first semiconductor wafer having a working surface and a wiring surface; a second semiconductor wafer having a working surface and a wiring surface; a number of trenches formed in the working surfaces of the first and second semiconductor wafers; wherein the working surfaces of the first and second semiconductor wafers are bonded together to form the bounded silicon structure such that the trenches from the first semiconductor wafer align with the trenches of the second semiconductor wafer to form cooling channels through the bounded silicon structure; and a wiring layer formed on the wiring surfaces of the first and second semiconductor wafers.
Claim 57
Dependent Claim
108 words
A bounded silicon structure, comprising: a first semiconductor wafer having a working surface and a wiring surface; a second semiconductor wafer having a working surface and a wiring surface; a number of trenches formed in the working surfaces of the first and second semiconductor wafers; wherein the working surfaces of the first and second semiconductor wafers are bonded together to form the bounded silicon structure such that the trenches from the first semiconductor wafer align with the trenches of the second semiconductor wafer to form cooling channels through the bounded silicon structure; and a wiring layer formed on the wiring surfaces of the first and second semiconductor wafers.
Claim 58
Dependent Claim
141 words
An electronic system module, comprising: a semiconductor wafer having first and second opposing surfaces and having cooling channels passing through the interposer between the first and second opposing surfaces; wherein the semiconductor wafer is formed from first and second wafers of semiconductor material bonded together; wherein the cooling channels are filled with a liquid; a wiring layer having portions formed on the first and second opposing surfaces of the semiconductor wafer; the wiring layer including a number of electrical connections extending through the semiconductor wafer; a number of semiconductor chips disposed outwardly from at least one of the surfaces of the semiconductor wafer and interconnected using the wiring layer; each semiconductor chip having a working surface containing an integrated circuit that is coupled to the wiring layer; and wherein the number of semiconductor chips include a microprocessor and a memory device.
Claim 59
Dependent Claim
141 words
An electronic system module, comprising: a semiconductor wafer having first and second opposing surfaces and having cooling channels passing through the interposer between the first and second opposing surfaces; wherein the semiconductor wafer is formed from first and second wafers of semiconductor material bonded together; wherein the cooling channels are filled with a liquid; a wiring layer having portions formed on the first and second opposing surfaces of the semiconductor wafer; the wiring layer including a number of electrical connections extending through the semiconductor wafer; a number of semiconductor chips disposed outwardly from at least one of the surfaces of the semiconductor wafer and interconnected using the wiring layer; each semiconductor chip having a working surface containing an integrated circuit that is coupled to the wiring layer; and wherein the number of semiconductor chips include a microprocessor and a memory device.
Claim 60
Independent Claim
70 words
A method for forming a bounded silicon structure, the method comprising: forming trenches in working surfaces of first and second semiconductor wafers; bonding the wafers together to form the bounded silicon structure such that the trenches align to form cooling channels in the bounded silicon structure; and forming a wiring layer on at least one surface of the semiconductor wafers which is on an opposing side from the working surfaces.
Claim 61
Independent Claim
70 words
A method for forming a bounded silicon structure, the method comprising: forming trenches in working surfaces of first and second semiconductor wafers; bonding the wafers together to form the bounded silicon structure such that the trenches align to form cooling channels in the bounded silicon structure; and forming a wiring layer on at least one surface of the semiconductor wafers which is on an opposing side from the working surfaces.
Claim 62
Dependent Claim
17 words
The method of claim 52 , wherein forming trenches comprises forming trenches using an anodic etching process.
Claim 63
Dependent Claim
16 words
The method of claim 52 , wherein bonding the wafers comprises using a vacuum bonding process.
Claim 64
Dependent Claim
62 words
The method of claim 52 , wherein forming the wiring layer comprises: forming a first layer on a surface opposing the working surface of the first semiconductor wafer; forming a second layer on a surface opposing the working surface of the second semiconductor wafer; and forming vias through the bounded silicon structure in order to selectively connect the first and second layers.
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| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2005-12-16 | 2006-06-17 | 2006-12-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2009-12-16 | 2010-06-17 | 2010-12-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2013-12-16 | 2014-06-17 | 2014-12-17 | $7700.00 | Window Closed / Lapsed |