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US5822856A Expired / Lapsed US ⏱️ 0.0 years remaining

Manufacturing circuit board assemblies having filled vias

Assignee: International Business Machines Corp
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Filing: 1996-06-28
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Granted: 1998-10-20
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Expires: 2016-06-28
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Abstract

Abstract Circuit boards are manufactured by forming a substrate with a dielectric surface, laminating a metal foil and a peelable film to the substrate, and forming holes in the substrate through the peelable film and foil. A filler material with an organic base may be filled with electroconductive particles or dielectric thermoconductive particles. The filler material is laminated onto the peelable film with sufficient heat and pressure to force the filler material to fill the holes. For thermoconductive filler the holes are filled sufficient for electrical connection through the holes. The filler material is abraded to the level of the foil and is then copper plated. The copper is patterned to form a wiring layer. A permanent dielectric photoresist layer is formed over the wiring layer and via holes are formed through the photoimageable dielectric over pads and conductors of the wiring layer. Holes are formed through the substrate and the photoimageable dielectric, walls of the via holes, and walls of the through holes are copper plated. The copper plating on the photoimageable dielectric is patterned of form an exterior wiring layer. Components and/or pins are attached to the surface of the circuitized substrate with solder joints to form a high density circuit board assembly.

Inventors

  • 👤 Anilkumar Chinuprasad Bhatt
  • 👤 Donald Herman Glatzel
  • 👤 Allen F. Moring
  • 👤 Voya Rista Markovich
  • 👤 Kostas Papathomas
  • 👤 David John Russell

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 10:15
CPC Classifications
H; H05; H05K; H05K3/00; H05K3/46; H05K3/4644; H05K3/4652; H05K1/00; H05K1/02; H05K1/11; H05K1/111; H05K1/112; H05K1/113; H05K3/40; H05K3/4038; H05K3/4053; H05K3/4069; H05K3/4602; H05K2201/00; H05K2201/03; H05K2201/0332; H05K2201/0335; H05K2201/0347; H05K2201/0355; H05K2201/09; H05K2201/09145; H05K2201/092; H05K2201/09209; H05K2201/095; H05K2201/0959; H05K2203/00; H05K2203/01; H05K2203/0191; H05K2203/02; H05K2203/025; H05K2203/0278; H05K2203/03; H05K2203/0338; H05K2203/05; H05K2203/0548; H05K2203/0554; H05K3/0011; H05K3/0017; H05K3/0023; H05K3/0094; H05K3/02; H05K3/022; H05K3/025; H05K3/22; H05K3/24; H05K3/245; H05K3/246; H05K3/42; H05K3/429; H10; H10W; H10W74/00; H10W74/10; H10W74/15; Y; Y10; Y10S; Y10S428/00; Y10S428/901; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/49126; Y10T29/4913; Y10T29/49139; Y10T29/49144; Y10T29/49155; Y10T29/49165; Y10T428/00; Y10T428/24; Y10T428/24802; Y10T428/24917; Y10T428/24926; Y10T428/24942; Y10T428/249921; Y10T428/249994; Y10T428/249995; Y10T428/249996

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 143 words
A method for producing a circuit assembly, comprising: providing a circuitized substrate; forming holes in said circuitized substrate; providing a filler material; injecting said filler material into said holes; forming a first wiring layer of patterned metal on a surface of said circuitized substrate including plating an external surface of said filler material with electroconductive metal; depositing a layer of photoresist over said first wiring layer; forming conductive vias through said layer of photoresist; forming a second wiring layer over said layer of photoresist including forming connectors to electrically connect electronic components to said second wiring layer; providing electronic components with terminals; providing joining material on said connectors or said terminals of said electronic components, or both; placing said components onto said circuitized substrate with said terminals positioned for connection to said connectors; and heating said joining material sufficient to form interconnection joints.
Claim 2
Independent Claim 143 words
A method for producing a circuit assembly, comprising: providing a circuitized substrate; forming holes in said circuitized substrate; providing a filler material; injecting said filler material into said holes; forming a first wiring layer of patterned metal on a surface of said circuitized substrate including plating an external surface of said filler material with electroconductive metal; depositing a layer of photoresist over said first wiring layer; forming conductive vias through said layer of photoresist; forming a second wiring layer over said layer of photoresist including forming connectors to electrically connect electronic components to said second wiring layer; providing electronic components with terminals; providing joining material on said connectors or said terminals of said electronic components, or both; placing said components onto said circuitized substrate with said terminals positioned for connection to said connectors; and heating said joining material sufficient to form interconnection joints.
Claim 3
Dependent Claim 21 words
The method of claim 1 in which: the step of providing said joining material comprises providing an electroconductive organic based material.
Claim 4
Dependent Claim 53 words
The method for producing a circuit assembly of claim 1, further comprising securing a structure having at least one separable layer to said circuitized substrate prior to forming holes in said circuitized substrate and injecting said filler material into said holes, and thereafter removing said at least one separable layer of said structure.
Claim 5
Dependent Claim 36 words
The method for producing a circuit assembly of claim 3 further comprising: providing a metal foil; and laminating a removable covering to said metal foil, thereby forming said structure having said at least one separable layer.
Claim 6
Dependent Claim 34 words
The method for producing a circuit assembly of claim 1 in which the step of providing a filler material further comprises: providing an organic base; and filling said organic base with electrically conductive particles.
Claim 7
Independent Claim 175 words
A method for producing a circuit assembly, comprising: providing a circuitized substrate; forming holes in said circuitized substrate; providing a filler material; spreading said filler material against said circuitized substrate; placing a sacrificial carrier in contact with said filler material; applying sufficient heat and pressure to said sacrificial carrier to force said filler material into said holes, substantially filling said holes; forming a first wiring layer of patterned metal on a surface of said circuitized substrate including plating an external surface of said filler material with electroconductive metal; depositing a layer of photoresist over said first wiring layer; forming conductive vias through said layer of photoresist; forming a second wiring layer over said layer of photoresist including forming connectors to electrically connect electronic components to said second wiring layer; providing electronic components with terminals; providing joining material on said connectors or said terminals of said electronic components, or both; placing said components onto said circuitized substrate with said terminals positioned for connection to said connectors; and heating said joining material sufficient to form interconnection joints.
Claim 8
Independent Claim 175 words
A method for producing a circuit assembly, comprising: providing a circuitized substrate; forming holes in said circuitized substrate; providing a filler material; spreading said filler material against said circuitized substrate; placing a sacrificial carrier in contact with said filler material; applying sufficient heat and pressure to said sacrificial carrier to force said filler material into said holes, substantially filling said holes; forming a first wiring layer of patterned metal on a surface of said circuitized substrate including plating an external surface of said filler material with electroconductive metal; depositing a layer of photoresist over said first wiring layer; forming conductive vias through said layer of photoresist; forming a second wiring layer over said layer of photoresist including forming connectors to electrically connect electronic components to said second wiring layer; providing electronic components with terminals; providing joining material on said connectors or said terminals of said electronic components, or both; placing said components onto said circuitized substrate with said terminals positioned for connection to said connectors; and heating said joining material sufficient to form interconnection joints.
Claim 9
Dependent Claim 21 words
The method of claim 6 in which the step of providing said joining material comprises providing an electroconductive organic based material.
Claim 10
Dependent Claim 53 words
The method for producing a circuit assembly of claim 6, further comprising securing a structure having at least one separable layer to said circuitized substrate prior to forming holes in said circuitized substrate and injecting said filler material into said holes, and thereafter removing said at least one separable layer of said structure.
Claim 11
Dependent Claim 36 words
The method of producing a circuit assembly of claim 8, further comprising: providing a metal foil; and laminating a removable covering to said metal foil, thereby forming said structure having said at least one separable layer.
Claim 12
Dependent Claim 34 words
The method of producing a circuit assembly of claim 6 in which the step of providing a filler material further comprises: providing an organic base; and filling said organic base with electrically conductive particles.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2001-10-19 2002-04-20 2002-10-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2005-10-19 2006-04-20 2006-10-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2009-10-19 2010-04-20 2010-10-20 $7700.00 Window Closed / Lapsed

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