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Silicon on III-V semiconductor bonding for monolithic optoelectronic integration

Assignee: Massachusetts Institute of Technology
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Filing: 2000-07-14
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Granted: 2002-09-24
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Expires: 2020-07-14
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Abstract

Abstract In a method for bonding a silicon substrate to a III-V material substrate, a silicon substrate is contacted together with a III-V material substrate and the contacted substrates are annealed at a first temperature that is above ambient temperature, e.g., at a temperature of between about 150° C. and about 350° C. The silicon substrate is then thinned. This bonding process enables the fabrication of thick, strain-sensitive and defect-sensitive optoelectronic devices on the optimum substrate for such, namely, a thick III-V material substrate, while enabling the fabrication of silicon electronic devices in a thin silicon layer, resulting from the thinned Si substrate, that is sufficient for such fabrication but which has been thinned to eliminate thermally-induced stress in both the Si and III-V materials. The III-V material substrate thickness thereby provides the physical strength of the composite substrate structure, while the thinned silicon substrate minimizes stress in the composite structure.

Inventors

  • 👤 Clifton G. Fonstad, Jr.
  • 👤 Joanna M. London
  • 👤 Joseph F. Ahadian

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 23:33
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H10D84/02; H10D84/05; G; G02; G02B; G02B6/00; G02B6/10; G02B6/12; G02B6/122; G02B6/124; G02B6/1245; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/0193; H10D84/08; H10D86/00; H10D86/01; H10D87/00; H10D88/00; H10P; H10P10/00; H10P10/12; H10P10/128; H10P90/00; H10P90/19; H10P90/1904; H10P90/1906; H10P90/1914; H10P90/1916; H10P90/1922; H10W; H10W10/00; H10W10/10; H10W10/181; H10P72/00; H10P72/70; H10P72/74; H10P72/7432

Claims Analysis

Total Claims: 28
Claim 1
Independent Claim 43 words
A method for bonding a silicon substrate to a III-V material substrate, comprising the steps of: contacting the silicon substrate together with the III-V material substrate; annealing the contacted substrates at a first temperature above ambient temperature; and thinning only the silicon substrate.
Claim 2
Independent Claim 43 words
A method for bonding a silicon substrate to a III-V material substrate, comprising the steps of: contacting the silicon substrate together with the III-V material substrate; annealing the contacted substrates at a first temperature above ambient temperature; and thinning only the silicon substrate.
Claim 3
Dependent Claim 27 words
The method of claim 1 wherein annealing of the contacted substrates is carried out at a first temperature of between about 150° C. and about 350° C.
Claim 4
Dependent Claim 20 words
The method of claim 1 further comprising a last step of fabricating silicon electronic devices on the thinned silicon substrate.
Claim 5
Dependent Claim 25 words
The method of claim 3 further comprising a step of fabricating III-V electronic devices on the III-V material substrate after thinning of the silicon substrate.
Claim 6
Dependent Claim 26 words
The method of claim 3 further comprising a step of fabricating III-V material optical devices on the III-V material substrate after thinning of the silicon substrate.
Claim 7
Dependent Claim 24 words
The method of claim 5 wherein the step of fabricating III-V material optical devices comprises growing a heteroepitaxial layer on the III-V material substrate.
Claim 8
Dependent Claim 29 words
The method of claim 1 further comprising a step of fabricating silicon electronic devices on the silicon substrate before contacting the silicon substrate together with the III-V material substrate.
Claim 9
Dependent Claim 31 words
The method of claim 7 further comprising a step of fabricating III-V material electronic devices on the III-V material substrate before contacting the III-V material substrate together with the silicon substrate.
Claim 10
Dependent Claim 31 words
The method of claim 7 further comprising a step of fabricating III-V material optical devices on the III-V material substrate before contacting the III-V material substrate together with the silicon substrate.
Claim 11
Independent Claim 25 words
The method of either of claims 4 or 8 further comprising a step of fabricating an electrical interconnection between silicon and III-V material electronic devices.
Claim 12
Dependent Claim 34 words
The method of claim 1 further comprising a first step of forming a dielectric layer on at least one of a silicon substrate surface and a III-V material substrate surface to be contacted together.
Claim 13
Dependent Claim 51 words
The method of claim 11 wherein forming a dielectric layer on at least one of a silicon substrate surface and a III-V material substrate surface to be contacted together comprises forming a dielectric layer on each of the silicon substrate surface and the III-V material substrate surface to be contacted together.
Claim 14
Dependent Claim 13 words
The method of claim 10 wherein the dielectric layer comprises an oxide layer.
Claim 15
Dependent Claim 13 words
The method of claim 11 wherein the dielectric layer comprises a nitride layer.
Claim 16
Dependent Claim 27 words
The method of claim 1 further comprising a first step of rendering hydrophilic a silicon substrate surface and a III-V material substrate surface to be contacted together.
Claim 17
Dependent Claim 14 words
The method of claim 1 wherein the III-V material substrate comprises a GaAs substrate.
Claim 18
Dependent Claim 14 words
The method of claim 1 wherein the III-V material substrate comprises an InP substrate.
Claim 19
Dependent Claim 27 words
The method of claim 1 wherein the step of thinning the silicon substrate comprises thinning the silicon substrate to a thickness of less than about 1 micron.
Claim 20
Dependent Claim 27 words
The method of claim 18 wherein the step of thinning the silicon substrate comprises thinning the silicon substrate to a thickness of less than about 5000 angstroms.
Claim 21
Dependent Claim 27 words
The method of claim 19 wherein the step of thinning the silicon substrate comprises thinning the silicon substrate to a thickness of less than about 2000 angstroms.
Claim 22
Dependent Claim 14 words
The method of claim 1 wherein the silicon substrate comprises a silicon-on-insulator (SOI) substrate.
Claim 23
Dependent Claim 15 words
The method of claim 1 wherein the silicon substrate comprises a separation-by-implantation-of-oxygen (SIMOX) substrate configuration.
Claim 24
Dependent Claim 40 words
The method of claim 1 wherein contacting the silicon substrate together with the III-V material substrate comprises applying pressure to the silicon substrate and the III-V material substrate as the silicon substrate and the III-V material substrate are contacted together.
Claim 25
Dependent Claim 32 words
The method of claim 1 further comprising a last step of annealing the III-V material substrate and the thinned silicon substrate at a second temperature that is greater than the first temperature.
Claim 26
Dependent Claim 15 words
The method of claim 24 wherein the second temperature is greater than about 200° C.
Claim 27
Dependent Claim 15 words
The method of claim 25 wherein the second temperature is greater than about 350° C.
Claim 28
Dependent Claim 38 words
The method of claim 1 further comprising a last step of annealing the III-V material substrate and the thinned silicon substrate at a second temperature at which further thermal processing of the substrates is to be carried out.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2005-09-23 2006-03-25 2006-09-24 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2009-09-23 2010-03-25 2010-09-24 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2013-09-23 2014-03-25 2014-09-24 $7700.00 Window Closed / Lapsed

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