Wafer joined optoelectronic integrated circuits and method

Claim 1

The full wafer method of fabricating first semiconductor material comprised and second semiconductor material comprised photo transducer inclusive electronic circuit assemblies comprising the steps of: forming on an exposed surface of a first semiconductor material first wafer substrate member a buffer and stop etch layer of a first metal inclusive alloy; growing on said buffer and stop etch layer an optical energy absorbing layer of second semiconductor material composition; depositing on said second semiconductor material layer a current blocking barrier layer of a second metal inclusive alloy; removing lateral area portions of said formed, grown and deposited layers to define in the remainder thereof upstanding epitaxial layered mesas of said second semiconductor material included composition; disposing layers of ohmic electrical contact first metal alloy on selected contact areas of said upstanding epitaxial layered mesas; fabricating electrical gate non-conductive electrodes of second metal alloy composition on selected areas of said upstanding epitaxial layered mesas; attaching exposed mesa surface portions of said wafer of photodetector devices to a surface coated optically transparent intermediary second substrate member; removing said first semiconductor material first wafer from said second intermediary substrate member attached mesas to expose said optical energy layer backside surface portion of each said mesa; visually aligning said second intermediary substrate member fixed wafer array of mesas and said disposed and fabricated areas of first and second metal alloy attendant thereto with registered and additional metal attended electrical circuit areas of a third substrate member second semiconductor wafer; contacting and bonding together said second substrate member metal alloy and said third substrate member additional metal to form an array of two-wafer received electrical circuit assemblies having an exposed backside photodetector input port each; removing said intermediary second substrate member from said bonded together electrical circuit assemblies; and segregating said array of two substrate wafer received electrical circuit assemblies into individual circuit die of said second semiconductor and said second substrate member respective dispositions and exposed backside photodetector input port each.

Claim 13

The method of fabricating dissimilar wafer received photo field effect transistor electrical circuit assemblies comprising the steps of: fabricating an array of epitaxial layered first semiconductor material comprised, mesa member configured, photo field effect transistor elements that are received via metal conductor bearing mesa plateau surfaces thereof on a secondary substrate wafer member; visually aligning said mesa members and said mesa connected metal conductors with congruently complementary metal conductors of a tertiary permanent substrate wafer member; contacting and bonding together said metal conductors of said secondary and tertiary wafer substrate members to form an array of two-wafer received phototransistor assemblies; removing said secondary substrate wafer member from said array of phototransistor assemblies; segregating said array of phototransistor assemblies into sub assemblies of at least one phototransistors each.

Claim 14

The method of fabricating dissimilar wafer received photo field effect transistor electrical circuit assemblies comprising the steps of: fabricating an array of epitaxial layered first semiconductor material comprised, mesa member configured, photo field effect transistor elements that are received via metal conductor bearing mesa plateau surfaces thereof on a secondary substrate wafer member; visually aligning said mesa members and said mesa connected metal conductors with congruently complementary metal conductors of a tertiary permanent substrate wafer member; contacting and bonding together said metal conductors of said secondary and tertiary wafer substrate members to form an array of two-wafer received phototransistor assemblies; removing said secondary substrate wafer member from said array of phototransistor assemblies; segregating said array of phototransistor assemblies into sub assemblies of at least one phototransistors each.