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US4618877A Expired / Lapsed US ⏱️ 0.0 years remaining

Power semiconductor device with mesa type structure

Assignee: Toshiba Corp
•
Filing: 1984-12-18
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Granted: 1986-10-21
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Expires: 2004-12-18
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Abstract

Abstract A mesa type power semiconductor device comprising a mesa groove disposed on the bottom thereof with separated gate electrodes leaving the central portion of the groove bottom free from a gate electrode. This construction is effective in preventing occurrence of an insulator breakdown between a cathode and a gate electrode.

Inventors

  • 👤 Youichi Araki
  • 👤 Yoshinari Uetake

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 15:09
CPC Classifications
H; H10; H10W; H10W74/00; H10W74/10; H10W74/131; H10W74/134; H10D; H10D18/00; H10D18/60; H10D62/00; H10D62/10; H10D62/13; H10D62/133; H10D62/135; H10D64/00; H10D64/20; H10D64/27; H10D64/281; H10D64/291; H10W74/137

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 70 words
A power semiconductor device of mesa type structure having a semiconductor element surface formed with a mesa type groove and a gate electrode formed on the bottom of the groove and covered on an exposed surface thereof with an insulator, wherein said electrode is divided into two and spaced apart to be disposed only at both peripheries of the groove bottom, and an insulator is filled between the spaced electrodes.
Claim 2
Dependent Claim 70 words
A power semiconductor device of mesa type structure having a semiconductor element surface formed with a mesa type groove and a gate electrode formed on the bottom of the groove and covered on an exposed surface thereof with an insulator, wherein said electrode is divided into two and spaced apart to be disposed only at both peripheries of the groove bottom, and an insulator is filled between the spaced electrodes.
Claim 3
Dependent Claim 28 words
The power semiconductor device according to claim 1, wherein an insulating film is formed in the groove bottom between the spaced electrodes, and said insulator is filled thereon.
Claim 4
Dependent Claim 48 words
The power semiconductor device according to claim 1, wherein the electrodes are spaced apart so that d/D falls between 0.3 and 0.5, where D represents an interval between the outside edges of the spaced electrodes and d represents an interval between the inside edges of the spaced electrodes.
Claim 5
Dependent Claim 39 words
The power semiconductor device according to claim 1, wherein said semiconductor device is of a compression-bonded encapsulation-type semiconductor device such that a plurality of electrodes formed in a mesa type structure and a thermal buffer plate are pressed together.
Claim 6
Dependent Claim 24 words
The power semiconductor device according to claim 4, wherein the thermal buffer plate is pressed toward the groove through a relatively collapsible cathode electrode.

References Cited (Backward Citations)

JPS5312270A Cited
US4156963A Cited
JPS5457976A Cited
US4246596A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-10-20 1990-04-21 1990-10-21 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-10-20 1994-04-21 1994-10-21 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-10-20 1998-04-21 1998-10-21 $7700.00 Window Closed / Lapsed

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