Method of manufacturing semiconductor device with reduced charge trapping

Claim 1

A method of manufacturing a semiconductor device, the method comprising the steps of: providing a substrate; providing a gate electrode contacting the substrate; disposing a dielectric layer comprising nitrogen over the substrate and over the gate electrode and at two opposite sides of the gate electrode; forming a spacer over a portion of the dielectric layer and at two opposite sides of the gate electrode, the portion of the dielectric layer located at the two opposite sides of the gate electrode and located underneath the spacer, the spacer comprised of a dielectric material different from the dielectric layer; and implanting ions into a different portion of the dielectric layer at the two opposite sides of the gate electrode, wherein a peak concentration of the ions remains in the dielectric layer at the two opposite sides of the gate electrode during the implanting step and wherein the spacer prevents the portion of the dielectric layer from being implanted by the ions.

Claim 2

A method of manufacturing a semiconductor device, the method comprising the steps of: providing a substrate; providing a gate electrode contacting the substrate; disposing a dielectric layer comprising nitrogen over the substrate and over the gate electrode and at two opposite sides of the gate electrode; forming a spacer over a portion of the dielectric layer and at two opposite sides of the gate electrode, the portion of the dielectric layer located at the two opposite sides of the gate electrode and located underneath the spacer, the spacer comprised of a dielectric material different from the dielectric layer; and implanting ions into a different portion of the dielectric layer at the two opposite sides of the gate electrode, wherein a peak concentration of the ions remains in the dielectric layer at the two opposite sides of the gate electrode during the implanting step and wherein the spacer prevents the portion of the dielectric layer from being implanted by the ions.

Claim 7

A method of manufacturing a semiconductor device, the method comprising the steps of: providing a substrate having a surface; forming a gate electrode contacting the surface of the substrate; disposing a dielectric layer comprising nitrogen over the surface of the substrate and over the gate electrode and at two opposite sides of the gate electrode; forming a spacer over a portion of the dielectric layer and at the two opposite sides of the gate electrode, the portion of the dielectric layer located at the two opposite sides of the gate electrode and located underneath the spacer, the spacer comprised of a dielectric material different from the dielectric layer; and implanting ions into a different portion of the dielectric layer at the two opposite sides of the gate electrode wherein a peak concentration of the ions remains in the dielectric layer at the two opposite sides of the gate electrode during the implanting step, wherein the ions are implanted at an angle of greater than or equal to forty-five degrees and less than ninety degrees with respect to the surface of the substrate, and wherein the spacer blocks the ions from the portion of the dielectric layer during the implanting step.

Claim 8

A method of manufacturing a semiconductor device, the method comprising the steps of: providing a substrate having a surface; forming a gate electrode contacting the surface of the substrate; disposing a dielectric layer comprising nitrogen over the surface of the substrate and over the gate electrode and at two opposite sides of the gate electrode; forming a spacer over a portion of the dielectric layer and at the two opposite sides of the gate electrode, the portion of the dielectric layer located at the two opposite sides of the gate electrode and located underneath the spacer, the spacer comprised of a dielectric material different from the dielectric layer; and implanting ions into a different portion of the dielectric layer at the two opposite sides of the gate electrode wherein a peak concentration of the ions remains in the dielectric layer at the two opposite sides of the gate electrode during the implanting step, wherein the ions are implanted at an angle of greater than or equal to forty-five degrees and less than ninety degrees with respect to the surface of the substrate, and wherein the spacer blocks the ions from the portion of the dielectric layer during the implanting step.

Claim 11

A method of manufacturing a semiconductor device, the method comprising the steps of: providing a compound semiconductor substrate; forming a gate electrode contacting the compound semiconductor substrate, the gate electrode comprised of tungsten; depositing a dielectric layer comprising silicon nitride over the compound semiconductor substrate and over the gate electrode and at two opposite sides of the gate electrode wherein the dielectric layer contacts the compound semiconductor substrate and the gate electrode; forming a dielectric spacer over a portion of the dielectric layer and at the two opposite sides of the gate electrode by depositing a different dielectric layer over the dielectric layer and by isotropically etching the different dielectric layer wherein the different dielectric layer is completely exposed while isotropically etching the different dielectric layer, wherein the portion of the dielectric layer is located at the two opposite sides of the gate electrode and is located underneath the spacer, wherein the dielectric spacer contacts the portion of the dielectric layer at the two opposite sides of the gate electrode and is devoid of directly contacting the gate electrode, wherein the spacer is comprised of a dielectric material different from the dielectric layer, wherein a first portion of the spacer is located at a first one of the two opposite sides of the gate electrode, and wherein a second portion of the spacer is located at a second one of the two opposite sides of the gate electrode and is substantially symmetric to the first portion of the spacer; implanting ions into a different portion of the dielectric layer at the two opposite sides of the gate electrode, wherein a peak concentration of the ions remains in the dielectric layer at the two opposite sides of the gate electrode during the implanting step, wherein the ions are comprised of silicon, and wherein the dielectric spacer blocks the ions from the portion of the dielectric layer during the implanting step; and keeping the dielectric spacer at the two opposite sides of the gate electrode after implanting the ions.

Claim 12

A method of manufacturing a semiconductor device, the method comprising the steps of: providing a compound semiconductor substrate; forming a gate electrode contacting the compound semiconductor substrate, the gate electrode comprised of tungsten; depositing a dielectric layer comprising silicon nitride over the compound semiconductor substrate and over the gate electrode and at two opposite sides of the gate electrode wherein the dielectric layer contacts the compound semiconductor substrate and the gate electrode; forming a dielectric spacer over a portion of the dielectric layer and at the two opposite sides of the gate electrode by depositing a different dielectric layer over the dielectric layer and by isotropically etching the different dielectric layer wherein the different dielectric layer is completely exposed while isotropically etching the different dielectric layer, wherein the portion of the dielectric layer is located at the two opposite sides of the gate electrode and is located underneath the spacer, wherein the dielectric spacer contacts the portion of the dielectric layer at the two opposite sides of the gate electrode and is devoid of directly contacting the gate electrode, wherein the spacer is comprised of a dielectric material different from the dielectric layer, wherein a first portion of the spacer is located at a first one of the two opposite sides of the gate electrode, and wherein a second portion of the spacer is located at a second one of the two opposite sides of the gate electrode and is substantially symmetric to the first portion of the spacer; implanting ions into a different portion of the dielectric layer at the two opposite sides of the gate electrode, wherein a peak concentration of the ions remains in the dielectric layer at the two opposite sides of the gate electrode during the implanting step, wherein the ions are comprised of silicon, and wherein the dielectric spacer blocks the ions from the portion of the dielectric layer during the implanting step; and keeping the dielectric spacer at the two opposite sides of the gate electrode after implanting the ions.